Gmac_Ip_EnableMDIO parameter ModuleClk

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Gmac_Ip_EnableMDIO parameter ModuleClk

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cszhang
Contributor II

Hi Nxp experts,

I read the RTD_ETH_43_GMAC_UM.pdf,

7.2.6.18 Gmac_Ip_EnableMDIO()
void Gmac_Ip_EnableMDIO (
                        uint8 Instance,
                        boolean MiiPreambleDisabled,
                        uint32 ModuleClk )

I wonder what the ModuleClk value is and its source.

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PavelL
NXP Employee
NXP Employee

Hello @cszhang ,

ModuleClk is the frequency of the GMAC module input clock (in Hz). It is used by the driver to configure the MDIO clock (MDC) divider so that MDC meets IEEE 802.3 timing requirements (≤ 2.5 MHz).

Sourcing of input MODULE_CLK depends on S32K3 version - please refer to S32K3xx Reference Manual, Rev. 12, chapter 24.6.1.1.4 EMAC clocking . If your S32K3 uses GMAC, then refer to input hclk/hclk_i and chapter 24.6.1.1.3 GMAC clocking.

Best regards,

Pavel

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