Fault Injection to cache location using an interface provide in emcem

[Rudved_3366]

Hello team,

I have addition question to below query (what values to select as arguments for eMcem_setupinjectionChannel - NXP Community

I need to inject a 2-bit fault in Cache location but I'm not sure what it means as mentioned in the reference manual and we use NXP s32K394 microcontroller:

I need to call below function 2 times to inject the faults in cache and get the 2-bit error in cache like below: 

If I'm doing wrongly, could you please share the example code how to do this injection, and currently we are using SAF package in our project, so if there are already fault injection code exists for the these, please share which file I need to refer to inject all kind of faults using (EIM) for memory test interface which is provided in SAF module.

[danielmartynek]

Hello @Rudved_3366,

I haven’t found an example of this cache injection, but here it is in a nutshell:

Before injecting the CM7_0 I-cache tag double-bit error, verify that the relevant I-cache error-bank entries (IEBRn) are available and unlocked.

I tested it on S32K344, which I have on the bench, I injected: 

	if (eMcem_SetupInjectionChannel(EMCEM_EIM_CH_3, 1, 2 ) != (Std_ReturnType)E_OK)
	{
		while (1U);
	}
	if (eMcem_InjectFault(EMCEM_EIM_CH_3) != (Std_ReturnType)E_OK)
	{
		while (1U);
	}

Then, in the handler, disable the EIM.

void BusFault_Handler(void)
{
if(IP_EIM->EIMCR & EIM_EIMCR_GEIEN_MASK)
{
IP_EIM->EIMCR = EIM_EIMCR_GEIEN(0);
}
}

NOTE that the recovery code (such as the vector table referenced by VTOR, the exception handler, and whatever the handler calls) must not be in a cacheable region, because we do not want the error to be injected again during recovery.

Then, read the IEBR registers again and clear them by writing 0 to them.

Call an API to invalidate the cache.

Regards,

Daniel

[Rudved_3366]

Hello @danielmartynek , 

can you please check above query also which is related to fault injection to cache address.