EMIOS PWM configuration in S32K312

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EMIOS PWM configuration in S32K312

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SasiKumar_Vengam
Contributor II

i Team,

We are using S32k312 MCU and we tried to configure Emios PWM using S32 Design Studio 3.5. We were not able to generate PWM signals. Please find the configuration in the below attachment and kindly correct if necessary. We are working on Non-Autosar Mode and we are using 6 PWM channels and the channels are given below.

SasiKumar_Vengam_0-1731946197107.pngSasiKumar_Vengam_1-1731946240011.pngSasiKumar_Vengam_2-1731946281847.pngSasiKumar_Vengam_3-1731946299112.png

Emios_Mcl_Ip_Init (EMIOS_1,&Emios_Mcl_Ip_1_Config_BOARD_INITPERIPHERALS);
Emios_Pwm_Ip_InitChannel(EMIOS_PWM_IP_I0_CH0_CFG,&Emios_Pwm_Ip_I0_Ch0);
Emios_Pwm_Ip_InitChannel(EMIOS_0,&Emios_Pwm_Ip_I0_Ch1);
Emios_Pwm_Ip_InitChannel(EMIOS_0,&Emios_Pwm_Ip_I0_Ch2);
Emios_Pwm_Ip_InitChannel(EMIOS_0,&Emios_Pwm_Ip_I0_Ch3);
Emios_Pwm_Ip_InitChannel(EMIOS_0,&Emios_Pwm_Ip_I0_Ch4);
// Emios_Pwm_Ip_InitChannel(EMIOS_1,&Emios_Pwm_Ip_I1_Ch0);
 
Note :- Emios_Pwm_Ip_I1_Ch0 channel  can't be able to init successfully. In below function code is getting terminate due to Base->CH.UC[Channel].C  value is zero but we have initalized
Emios_Mcl_Ip_Init() fn below and find the config attached image MCL_IP;
 Emios_Pwm_Ip_MasterBusModeType Emios_Pwm_Ip_GetChannelPwmMode( const Emios_Pwm_Ip_HwAddrType *const Base,
uint8 Channel)
while(1)
{
//Emios_Mcl_Ip_SetCounterBusPeriod(0,23,32768);
Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_PWM_IP_I0_CH0_CFG,EMIOS_PWM_IP_I0_CH0_CFG,3268);
sprintf( (char*)message, "Status_0  = %d   \n",Status);
Uart_logs_transmit(message);
TestDelay(DELAY_TIMER);
DutyCycle = Emios_Pwm_Ip_GetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH0_CFG);
sprintf( (char*)message, "DutyCycle  = %d   \n",DutyCycle);
Uart_logs_transmit(message);
 
Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH1_CFG,32768);
 
TestDelay(DELAY_TIMER);
Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH2_CFG,32768);
 
TestDelay(DELAY_TIMER);
Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH3_CFG,32768);
 
TestDelay(DELAY_TIMER);
Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH4_CFG,32768);
 
TestDelay(DELAY_TIMER);
Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I1_CH0_CFG,32768);
 
}
 
If we have missed anything, Let us know.
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Robin_Shen
NXP TechSupport
NXP TechSupport

If it is convenient, please send me the simple test project for a quick test.

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SasiKumar_Vengam
Contributor II
Hi @robin,
We have configured the PWM correctly using an example uploaded in the Community. We need to configure a GPIO pin as an Interrupt, could you please share any examples on this along with the ISR function implementation.
For your reference, we are using PTB1, PTC8 and PTC9 as GPIO input of the S32K312 MCU.
Thanks.
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Robin_Shen
NXP TechSupport
NXP TechSupport
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%3CLINGO-SUB%20id%3D%22lingo-sub-1996540%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ES32K312%E3%81%A7%E3%81%AEEMIOS%20PWM%E6%A7%8B%E6%88%90%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1996540%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3Ei%E3%83%81%E3%83%BC%E3%83%A0%E3%80%81%3C%2FP%3E%3CP%3ES32k312%20MCU%E3%82%92%E4%BD%BF%E7%94%A8%E3%81%97%E3%81%A6%E3%81%8A%E3%82%8A%E3%80%81S32%20Design%20Studio%203.5%E3%82%92%E4%BD%BF%E7%94%A8%E3%81%97%E3%81%A6Emios%20PWM%E3%81%AE%E8%A8%AD%E5%AE%9A%E3%82%92%E8%A9%A6%E3%81%BF%E3%81%BE%E3%81%97%E3%81%9F%E3%80%82PWM%E4%BF%A1%E5%8F%B7%E3%82%92%E7%94%9F%E6%88%90%E3%81%99%E3%82%8B%E3%81%93%E3%81%A8%E3%81%8C%E3%81%A7%E3%81%8D%E3%81%BE%E3%81%9B%E3%82%93%E3%81%A7%E3%81%97%E3%81%9F%E3%80%82%E4%BB%A5%E4%B8%8B%E3%81%AE%E6%B7%BB%E4%BB%98%E3%83%95%E3%82%A1%E3%82%A4%E3%83%AB%E3%81%A7%E6%A7%8B%E6%88%90%E3%82%92%E8%A6%8B%E3%81%A4%E3%81%91%E3%80%81%E5%BF%85%E8%A6%81%E3%81%AB%E5%BF%9C%E3%81%98%E3%81%A6%E4%BF%AE%E6%AD%A3%E3%81%97%E3%81%A6%E3%81%8F%E3%81%A0%E3%81%95%E3%81%84%E3%80%82%E7%8F%BE%E5%9C%A8%E3%80%81Non-Autosar%20%E3%83%A2%E3%83%BC%E3%83%89%E3%81%AB%E5%8F%96%E3%82%8A%E7%B5%84%E3%82%93%E3%81%A7%E3%81%8A%E3%82%8A%E3%80%816%20%E3%81%A4%E3%81%AE%20PWM%20%E3%83%81%E3%83%A3%E3%83%8D%E3%83%AB%E3%82%92%E4%BD%BF%E7%94%A8%E3%81%97%E3%81%A6%E3%81%8A%E3%82%8A%E3%80%81%E3%83%81%E3%83%A3%E3%83%8D%E3%83%AB%E3%82%92%E4%BB%A5%E4%B8%8B%E3%81%AB%E7%A4%BA%E3%81%97%E3%81%BE%E3%81%99%E3%80%82%3C%2FP%3E%3CP%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22SasiKumar_Vengam_0-1731946197107.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22SasiKumar_Vengam_0-1731946197107.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F311064i2D24BED9540EC33E%2Fimage-size%2Fmedium%3Fv%3Dv2%26amp%3Bpx%3D400%22%20role%3D%22button%22%20title%3D%22SasiKumar_Vengam_0-1731946197107.png%22%20alt%3D%22SasiKumar_Vengam_0-1731946197107.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22SasiKumar_Vengam_1-1731946240011.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22SasiKumar_Vengam_1-1731946240011.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F311065i1DBC6CB2DD2DDC40%2Fimage-size%2Fmedium%3Fv%3Dv2%26amp%3Bpx%3D400%22%20role%3D%22button%22%20title%3D%22SasiKumar_Vengam_1-1731946240011.png%22%20alt%3D%22SasiKumar_Vengam_1-1731946240011.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22SasiKumar_Vengam_2-1731946281847.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22SasiKumar_Vengam_2-1731946281847.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F311066i589A27171007B1DD%2Fimage-size%2Fmedium%3Fv%3Dv2%26amp%3Bpx%3D400%22%20role%3D%22button%22%20title%3D%22SasiKumar_Vengam_2-1731946281847.png%22%20alt%3D%22SasiKumar_Vengam_2-1731946281847.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22SasiKumar_Vengam_3-1731946299112.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22SasiKumar_Vengam_3-1731946299112.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F311067i675668BA1708C810%2Fimage-size%2Fmedium%3Fv%3Dv2%26amp%3Bpx%3D400%22%20role%3D%22button%22%20title%3D%22SasiKumar_Vengam_3-1731946299112.png%22%20alt%3D%22SasiKumar_Vengam_3-1731946299112.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3C%2FP%3E%3CDIV%3EEmios_Mcl_Ip_Init%20(EMIOS_1%2C%26amp%3BEmios_Mcl_Ip_1_Config_BOARD_INITPERIPHERALS)%3B%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EEmios_Pwm_Ip_InitChannel(EMIOS_PWM_IP_I0_CH0_CFG%2C%26amp%3BEmios_Pwm_Ip_I0_Ch0)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EEmios_Pwm_Ip_InitChannel(EMIOS_0%2C%26amp%3BEmios_Pwm_Ip_I0_Ch1)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EEmios_Pwm_Ip_InitChannel(EMIOS_0%2C%26amp%3BEmios_Pwm_Ip_I0_Ch2)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EEmios_Pwm_Ip_InitChannel(EMIOS_0%2C%26amp%3BEmios_Pwm_Ip_I0_Ch3)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EEmios_Pwm_Ip_InitChannel(EMIOS_0%2C%26amp%3BEmios_Pwm_Ip_I0_Ch4)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%2F%2F%20Emios_Pwm_Ip_InitChannel(EMIOS_1%2C%26amp%3BEmios_Pwm_Ip_I1_Ch0)%3B%3C%2FDIV%3E%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%3CDIV%3E%3CSTRONG%3E%E6%B3%A8%3A-Emios_Pwm_Ip_I1_Ch0%3C%2FSTRONG%3E%20%E3%83%81%E3%83%A3%E3%83%8D%E3%83%AB%E3%82%92%E6%AD%A3%E5%B8%B8%E3%81%AB%E5%88%9D%E6%9C%9F%E5%8C%96%E3%81%A7%E3%81%8D%E3%81%BE%E3%81%9B%E3%82%93%E3%80%82%E4%BB%A5%E4%B8%8B%E3%81%AE%E9%96%A2%E6%95%B0%E3%82%B3%E3%83%BC%E3%83%89%E3%81%AF%E3%80%81Base-%26gt%3BCH%E3%81%AE%E3%81%9F%E3%82%81%E3%81%AB%E7%B5%82%E4%BA%86%E3%81%97%E3%81%A6%E3%81%84%E3%81%BE%E3%81%99%E3%80%82UC%5B%E3%83%81%E3%83%A3%E3%83%B3%E3%83%8D%E3%83%AB%5D%E3%80%82C%E5%80%A4%E3%81%AF%E3%82%BC%E3%83%AD%E3%81%A7%E3%81%99%E3%81%8C%E3%80%81%E5%88%9D%E6%9C%9F%E5%8C%96%E3%81%97%E3%81%BE%E3%81%97%E3%81%9F%3C%2FDIV%3E%3CDIV%3EEmios_Mcl_Ip_Init()%20fn%20%E3%81%A7%E3%80%81%E8%A8%AD%E5%AE%9A%E3%81%AB%E6%B7%BB%E4%BB%98%E3%81%95%E3%82%8C%E3%81%9F%E3%82%A4%E3%83%A1%E3%83%BC%E3%82%B8MCL_IP%E3%82%92%E8%A6%8B%E3%81%A4%E3%81%91%E3%81%BE%E3%81%99%E3%80%82%3C%2FDIV%3E%3CDIV%3EEmios_Pwm_Ip_MasterBusModeType%20Emios_Pwm_Ip_GetChannelPwmMode(%20const%20Emios_Pwm_Ip_HwAddrType%20*const%20%E3%83%99%E3%83%BC%E3%82%B9%2C%3CBR%20%2F%3Euint8%20%E3%83%81%E3%83%A3%E3%83%8D%E3%83%AB)%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3Ewhile(1)%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3E%7B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EEmios_Mcl_Ip_SetCounterBusPeriod(0%2C23%2C32768)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EStatus%20%3D%20Emios_Pwm_Ip_SetDutyCycle(EMIOS_PWM_IP_I0_CH0_CFG%2CEMIOS_PWM_IP_I0_CH0_CFG%2C3268)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3Esprintf(%20(char*)%E3%83%A1%E3%83%83%E3%82%BB%E3%83%BC%E3%82%B8%2C%20%22Status_0%20%3D%20%25d%20%5Cn%22%2C%E3%82%B9%E3%83%86%E3%83%BC%E3%82%BF%E3%82%B9)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EUart_logs_transmit(%E3%83%A1%E3%83%83%E3%82%BB%E3%83%BC%E3%82%B8)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3ETestDelay(DELAY_TIMER)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EDutyCycle%20%3D%20Emios_Pwm_Ip_GetDutyCycle(EMIOS_0%2CEMIOS_PWM_IP_I0_CH0_CFG)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3Esprintf(%20(char*)%E3%83%A1%E3%83%83%E3%82%BB%E3%83%BC%E3%82%B8%2C%20%22%E3%83%87%E3%83%A5%E3%83%BC%E3%83%86%E3%82%A3%E3%82%B5%E3%82%A4%E3%82%AF%E3%83%AB%20%3D%20%25d%20%5Cn%22%2C%E3%83%87%E3%83%A5%E3%83%BC%E3%83%86%E3%82%A3%E3%82%B5%E3%82%A4%E3%82%AF%E3%83%AB)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EUart_logs_transmit(%E3%83%A1%E3%83%83%E3%82%BB%E3%83%BC%E3%82%B8)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EStatus%20%3D%20Emios_Pwm_Ip_SetDutyCycle(EMIOS_0%2CEMIOS_PWM_IP_I0_CH1_CFG%2C32768)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3ETestDelay(DELAY_TIMER)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EStatus%20%3D%20Emios_Pwm_Ip_SetDutyCycle(EMIOS_0%2CEMIOS_PWM_IP_I0_CH2_CFG%2C32768)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3ETestDelay(DELAY_TIMER)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EStatus%20%3D%20Emios_Pwm_Ip_SetDutyCycle(EMIOS_0%2CEMIOS_PWM_IP_I0_CH3_CFG%2C32768)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3ETestDelay(DELAY_TIMER)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EStatus%20%3D%20Emios_Pwm_Ip_SetDutyCycle(EMIOS_0%2CEMIOS_PWM_IP_I0_CH4_CFG%2C32768)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3ETestDelay(DELAY_TIMER)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3EStatus%20%3D%20Emios_Pwm_Ip_SetDutyCycle(EMIOS_0%2CEMIOS_PWM_IP_I1_CH0_CFG%2C32768)%3B%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3E%7D%3C%2FSPAN%3E%3C%2FDIV%3E%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%3CDIV%3E%3CSPAN%3E%E4%BD%95%E3%81%8B%E8%A6%8B%E9%80%83%E3%81%97%E3%81%9F%E3%81%93%E3%81%A8%E3%81%8C%E3%81%82%E3%82%8C%E3%81%B0%E3%80%81%E3%81%8A%E7%9F%A5%E3%82%89%E3%81%9B%E3%81%8F%E3%81%A0%E3%81%95%E3%81%84%E3%80%82%3C%2FSPAN%3E%3C%2FDIV%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-1997788%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ERe%3AS32K312%E3%81%AEEMIOS%20PWM%E6%A7%8B%E6%88%90%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1997788%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E%E4%BB%A5%E4%B8%8B%E3%82%92%E3%81%94%E8%A6%A7%E3%81%8F%E3%81%A0%E3%81%95%E3%81%84%E3%80%82%3CBR%20%2F%3E%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2FS32-Design-Studio-Knowledge-Base%2FSIUL2-external-interrupt-example-project-using-S32K3-RTD-without%2Fta-p%2F1552335%22%20target%3D%22_self%22%3EAUTOSAR%E3%82%92%E4%BD%BF%E7%94%A8%E3%81%97%E3%81%AA%E3%81%84S32K3%20RTD%E3%82%92%E4%BD%BF%E7%94%A8%E3%81%97%E3%81%9FSIUL2%E5%A4%96%E9%83%A8%E5%89%B2%E3%82%8A%E8%BE%BC%E3%81%BF%E3%82%B5%E3%83%B3%E3%83%97%E3%83%AB%E3%83%97%E3%83%AD%E3%82%B8%E3%82%A7%E3%82%AF%E3%83%88%3C%2FA%3E%3CBR%20%2F%3E%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2FS32K-Knowledge-Base%2FExample-S32K312-EIRQ-Interrupt-DS3-5-RTD300%2Fta-p%2F1787860%22%20target%3D%22_self%22%3E%E4%BE%8BS32K312%20EIRQ%E5%89%B2%E3%82%8A%E8%BE%BC%E3%81%BFDS3.5%20RTD300%3C%2FA%3E%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-1997722%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ERe%3AS32K312%E3%81%AEEMIOS%20PWM%E6%A7%8B%E6%88%90%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1997722%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fuser%2Fviewprofilepage%2Fuser-id%2F35076%22%20target%3D%22_blank%22%3E%E3%81%93%E3%82%93%E3%81%AB%E3%81%A1%E3%81%AF%40robin%3C%2FA%3E%E3%80%81%3CBR%20%2F%3E%E3%82%B3%E3%83%9F%E3%83%A5%E3%83%8B%E3%83%86%E3%82%A3%E3%81%AB%E3%82%A2%E3%83%83%E3%83%97%E3%83%AD%E3%83%BC%E3%83%89%E3%81%95%E3%82%8C%E3%81%9F%E4%BE%8B%E3%82%92%E4%BD%BF%E7%94%A8%E3%81%97%E3%81%A6%E3%80%81PWM%E3%82%92%E6%AD%A3%E3%81%97%E3%81%8F%E6%A7%8B%E6%88%90%E3%81%97%E3%81%BE%E3%81%97%E3%81%9F%E3%80%82GPIO%E3%83%94%E3%83%B3%E3%82%92%E5%89%B2%E3%82%8A%E8%BE%BC%E3%81%BF%E3%81%A8%E3%81%97%E3%81%A6%E6%A7%8B%E6%88%90%E3%81%99%E3%82%8B%E5%BF%85%E8%A6%81%E3%81%8C%E3%81%82%E3%82%8A%E3%81%BE%E3%81%99%E3%81%8C%E3%80%81ISR%E9%96%A2%E6%95%B0%E3%81%AE%E5%AE%9F%E8%A3%85%E3%81%A8%E3%81%A8%E3%82%82%E3%81%AB%E3%81%93%E3%82%8C%E3%81%AB%E9%96%A2%E3%81%99%E3%82%8B%E4%BE%8B%E3%82%92%E5%85%B1%E6%9C%89%E3%81%97%E3%81%A6%E3%81%8F%E3%81%A0%E3%81%95%E3%81%84%E3%80%82%3CBR%20%2F%3E%E5%8F%82%E8%80%83%E3%81%BE%E3%81%A7%E3%81%AB%E3%80%81PTB1%E3%80%81PTC8%E3%80%81PTC9%E3%82%92S32K312%20MCU%E3%81%AEGPIO%E5%85%A5%E5%8A%9B%E3%81%A8%E3%81%97%E3%81%A6%E4%BD%BF%E7%94%A8%E3%81%97%E3%81%A6%E3%81%84%E3%81%BE%E3%81%99%E3%80%82%3CBR%20%2F%3E%E6%84%9F%E8%AC%9D%E3%80%82%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-1997677%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ERe%3AS32K312%E3%81%AEEMIOS%20PWM%E6%A7%8B%E6%88%90%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1997677%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E%3CSPAN%3E%E3%81%94%E9%83%BD%E5%90%88%E3%81%8C%E8%89%AF%E3%81%91%E3%82%8C%E3%81%B0%E3%80%81%E7%B0%A1%E5%8D%98%E3%81%AA%E3%83%86%E3%82%B9%E3%83%88%E3%81%AE%E3%81%9F%E3%82%81%E3%81%AB%E7%B0%A1%E5%8D%98%E3%81%AA%E3%83%86%E3%82%B9%E3%83%88%E3%83%97%E3%83%AD%E3%82%B8%E3%82%A7%E3%82%AF%E3%83%88%E3%82%92%E9%80%81%E3%81%A3%E3%81%A6%E3%81%8F%E3%81%A0%E3%81%95%E3%81%84%E3%80%82%3C%2FSPAN%3E%3C%2FP%3E%3C%2FLINGO-BODY%3E