Hi @Saar,
The pulses can be counted in the FTM overflow interrupt, and the PWM output masked when the SW counter reaches a certain value.
Or a FTM trigger (for example, init_trig) can be rounted via TRGMUX to LPTMR that has Pulse Counter mode and can count the FTM triggers, generate an interrupt or a trigger on match to mask the PWM.
Regarding a single pulse, this was discussed here:
https://community.nxp.com/t5/S32K/S32K144-FTM-Output-Compare-for-Single-Pulse/m-p/844006
Max. PWM period depends on the FTM clock source.
For example, SOSCDIV1_CLK = 10MHz,
Max. EPWM period = (MOD − CNTIN + 0x0001) / 10MHz = 65536 / 10 MHz = 6.5536ms
danielmartynek_0-1702907206270.png
Regards,
Daniel