Clock Bias Disable Bit

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Clock Bias Disable Bit

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972276616
Contributor II

hello,
Is it feasible for me to set the CLKBIASDIS flag bit before entering VLPS mode?
It says to disable the SIRC clock, but to use THE VLPS mode you must use the SIRC clock.

Look forward to your answer, thank you
Zheng

微信截图_20210104092821.png

微信截图_20210104093026.png

  

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Zheng,

If SIRC is not enabled in VLPS modes, power consumption can be reduced by setting PMC_REGSC[CLKBIASDIS] bit. While using this bit, it must be ensured that respective clock modules are disabled in VLPS mode, else, severe malfunction of clock modules will happen.

PMC_REGSC[CLKBIASDIS] AN5425.png

You can see the Power consumption of VLPS with Peripherals disabled(With PMC_REGSC[CLKBIASDIS] set to 1)

With PMC_REGSC[CLKBIASDIS] set to 1.png

But if you want to use some peripherals in VLPS mode which need SIRC, then you can not set 1 to PMC_REGSC[CLKBIASDIS].

SCG_ENABLE_SIRC_IN_VLPS.png

Functional in VLPS mode with.png

Best Regards,
Robin
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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Zheng,

If SIRC is not enabled in VLPS modes, power consumption can be reduced by setting PMC_REGSC[CLKBIASDIS] bit. While using this bit, it must be ensured that respective clock modules are disabled in VLPS mode, else, severe malfunction of clock modules will happen.

PMC_REGSC[CLKBIASDIS] AN5425.png

You can see the Power consumption of VLPS with Peripherals disabled(With PMC_REGSC[CLKBIASDIS] set to 1)

With PMC_REGSC[CLKBIASDIS] set to 1.png

But if you want to use some peripherals in VLPS mode which need SIRC, then you can not set 1 to PMC_REGSC[CLKBIASDIS].

SCG_ENABLE_SIRC_IN_VLPS.png

Functional in VLPS mode with.png

Best Regards,
Robin
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Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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