Hi,
I got few questions about the LPSPI FIFO as follows:
1. through the manual, it says the LPSPI has TX & RX FIFO of 4 words. does "4 words ' here means the FIFO's depth is 4 and its width is 1 word, which is the FIFO size is 4 words?
2. If so, the PARAM register can config the maximum number of words in the receive FIFO to 2^RXFIFO, which can reach 256? (I think it's kind of unreasonable)
3. FIFO Status Register(FSR) Returns the number of words currently stored in the FIFO, but it only has 3bit( 7 at most), so Is the maximum LPSPI FIFO size 7 words? if not, then what is it?
many thanks for your patience!