About IAR Linker file setting on S32K146

[JunnyKim]

I'm using S32K146, and I'm trying to change from S32K146 GCC Compiler to IAR Compiler. However, after changing from S32DS to IAR Compiler, the application is not booting normally and is being reset. I suspect a problem with setting the Linker file, so please check if there is any problem with the Linker file

[S32K146_128_flash.ld] - GCC Compiler, normally booting 

/*
** ###################################################################
** Processor: S32K146 with 128 KB SRAM
** Compiler: GNU C Compiler
**
** Abstract:
** Linker file for the GNU C Compiler
**
** Copyright (c) 2015-2016 Freescale Semiconductor, Inc.
** Copyright 2017-2018 NXP
** All rights reserved.
**
** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
** THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.nxp.com
** mail: support@nxp.com
**
** ###################################################################
*/

/* Entry Point */
ENTRY(Reset_Handler)

HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x00000400;
/*STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x00000400;*/
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x00001000;
/* If symbol __flash_vector_table__=1 is defined at link time
* the interrupt vector will not be copied to RAM.
* Warning: Using the interrupt vector from Flash will not allow
* INT_SYS_InstallHandler because the section is Read Only.
*/

__flash_vector_table__ = 1;
M_VECTOR_RAM_SIZE = DEFINED(__flash_vector_table__) ? 0x0 : 0x0400;

/* Specify the memory areas */
MEMORY
{
/* Flash */
/*m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400*/
/*m_flash_config (RX) : ORIGIN = 0x00000400, LENGTH = 0x00000010*/
/*m_text (RX) : ORIGIN = 0x00000410, LENGTH = 0x000FFBF0*/

m_interrupts (RX) : ORIGIN = 0x00001000, LENGTH = 0x00000400
m_flash_config (RX) : ORIGIN = 0x00001400, LENGTH = 0x00000010
m_text (RX) : ORIGIN = 0x00001410, LENGTH = 0x000FEBF0

/* SRAM_L */
/*m_data (RW) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000 */
m_data (RW) : ORIGIN = 0x1FFF0000, LENGTH = 0x00003000

/* SRAM_U */
/*m_data_2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x0000F000 */
m_data_2 (RW) : ORIGIN = 0x1FFF3000, LENGTH = 0x0001C000
}

/* Define output sections */
SECTIONS
{
/* The startup code goes first into internal flash */
.interrupts :
{
__VECTOR_TABLE = .;
__interrupts_start__ = .;
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
__interrupts_end__ = .;
. = ALIGN(4);
} > m_interrupts

.flash_config :
{
. = ALIGN(4);
KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */
. = ALIGN(4);
} > m_flash_config

/* The program code and other data goes into internal flash */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.init) /* section used in crti.o files */
*(.fini) /* section used in crti.o files */
*(.eh_frame) /* section used in crtbegin.o files */
. = ALIGN(4);
} > m_text

/* Section used by the libgcc.a library for fvp4 */
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > m_text

__etext = .; /* Define a global symbol at end of code. */
__DATA_ROM = .; /* Symbol is used by startup for data initialization. */

.interrupts_ram :
{
. = ALIGN(4);
__VECTOR_RAM__ = .;
__RAM_START = .;
__interrupts_ram_start__ = .; /* Create a global symbol at data start. */
*(.m_interrupts_ram) /* This is a user defined section. */
. += M_VECTOR_RAM_SIZE;
. = ALIGN(4);
__interrupts_ram_end__ = .; /* Define a global symbol at data end. */
} > m_data

__VECTOR_RAM = DEFINED(__flash_vector_table__) ? ORIGIN(m_interrupts) : __VECTOR_RAM__ ;
__RAM_VECTOR_TABLE_SIZE = DEFINED(__flash_vector_table__) ? 0x0 : (__interrupts_ram_end__ - __interrupts_ram_start__) ;

.data : AT(__DATA_ROM)
{
. = ALIGN(4);
__DATA_RAM = .;
__data_start__ = .; /* Create a global symbol at data start. */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
__data_end__ = .; /* Define a global symbol at data end. */
} > m_data

__DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
__CODE_ROM = __DATA_END; /* Symbol is used by code initialization. */

.code : AT(__CODE_ROM)
{
. = ALIGN(4);
__CODE_RAM = .;
__code_start__ = .; /* Create a global symbol at code start. */
__code_ram_start__ = .;
*(.code_ram) /* Custom section for storing code in RAM */
. = ALIGN(4);
__code_end__ = .; /* Define a global symbol at code end. */
__code_ram_end__ = .;
} > m_data

__CODE_END = __CODE_ROM + (__code_end__ - __code_start__);
__CUSTOM_ROM = __CODE_END;

/* Custom Section Block that can be used to place data at absolute address. */
/* Use __attribute__((section (".customSection"))) to place data here. */
.customSectionBlock ORIGIN(m_data_2) : AT(__CUSTOM_ROM)
/*.customSectionBlock ORIGIN(m_data_2) : AT(0xFCFF0)*/
{
__customSection_start__ = .;
KEEP(*(.customSection)) /* Keep section even if not referenced. */
__customSection_end__ = .;
} > m_data_2
__CUSTOM_END = __CUSTOM_ROM + (__customSection_end__ - __customSection_start__);

/* Uninitialized data section. */
.bss :
{
/* This is used by the startup in order to initialize the .bss section. */
. = ALIGN(4);
__BSS_START = .;
__bss_start__ = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
__BSS_END = .;
} > m_data_2

/* Put heap section after the program data */
.heap :
{
. = ALIGN(8);
__end__ = .;
__heap_start__ = .;
PROVIDE(end = .);
PROVIDE(_end = .);
PROVIDE(__end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
__heap_limit = .;
__heap_end__ = .;
} > m_data_2

/* Initializes stack on the end of block */
__StackTop = ORIGIN(m_data_2) + LENGTH(m_data_2);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
__RAM_END = __StackTop;

.stack __StackLimit :
{
. = ALIGN(8);
__stack_start__ = .;
. += STACK_SIZE;
__stack_end__ = .;
} > m_data_2

.ARM.attributes 0 : { *(.ARM.attributes) }

ASSERT(__StackLimit >= __HeapLimit, "region m_data_2 overflowed with stack and heap")
}

[S32K146_128_flash.icf] - IAR Compiler, does not boot normally

/*
** ###################################################################
** Processor: S32K146 with 128 KB SRAM
** Compiler: IAR ANSI C/C++ Compiler for ARM
**
** Abstract:
** Linker file for the IAR ANSI C/C++ Compiler for ARM
**
** Copyright (c) 2015-2016 Freescale Semiconductor, Inc.
** Copyright 2017 NXP
** All rights reserved.
**
** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
** THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.nxp.com
** mail: support@nxp.com
**
** ###################################################################
*/

/* If symbol __flash_vector_table__=1 is defined at link time
* the interrupt vector will not be copied to RAM.
* Warning: Using the interrupt vector from FLASH will not allow
* INT_SYS_InstallHandler because the section is Read Only.
*/

define symbol __flash_vector_table__ = 1;

define symbol __ram_vector_table_size__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x00000400;
define symbol __ram_vector_table_offset__ = isdefinedsymbol(__flash_vector_table__) ? 0 : 0x000003FF;

/* Flash */
define symbol m_interrupts_start = 0x00001000;
define symbol m_interrupts_end = 0x000013FF;

define symbol m_flash_config_start = 0x00001400;
define symbol m_flash_config_end = 0x0000140F;

define symbol m_text_start = 0x00001410;
define symbol m_text_end = 0x000FFFFF;

/* SRAM_L */
define symbol m_interrupts_ram_start = 0x1FFF0000;
define symbol m_interrupts_ram_end = 0x1FFF0000 + __ram_vector_table_offset__;

define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
define symbol m_data_end = 0x1FFF2FFF;

/* SRAM_U */
define symbol m_data_2_start = 0x1FFF3000;
define symbol m_data_2_end = 0x2000EFFF;

/* Sizes */
if (isdefinedsymbol(__stack_size__)) {
define symbol __size_cstack__ = __stack_size__;
} else {
define symbol __size_cstack__ = 0x00001000;
}

if (isdefinedsymbol(__heap_size__)) {
define symbol __size_heap__ = __heap_size__;
} else {
define symbol __size_heap__ = 0x00000400;
}

define exported symbol __VECTOR_TABLE = m_interrupts_start;
define exported symbol __VECTOR_RAM = isdefinedsymbol(__flash_vector_table__) ? m_interrupts_start : m_interrupts_ram_start;
define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;

define exported symbol __RAM_START = m_interrupts_ram_start;
define exported symbol __RAM_END = m_data_2_end;

define memory mem with size = 4G;
define region m_flash_config_region = mem:[from m_flash_config_start to m_flash_config_end];
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
| mem:[from m_text_start to m_text_end];
define region DATA_region = mem:[from m_data_start to m_data_end];
define region DATA_region_2 = mem:[from m_data_2_start to m_data_2_end-__size_cstack__];
define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data_2_end];
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];

define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

/* Custom Section Block that can be used to place data at absolute address. */
/* Use __attribute__((section (".customSection"))) to place data here. */
define block customSectionBlock { section .customSection };

define block __CODE_ROM { section .textrw_init };
define block __CODE_RAM { section .textrw };

initialize manually { section .textrw };
initialize manually { section .bss };
initialize manually { section .customSection };
initialize manually { section .data };
initialize manually { section __DLIB_PERTHREAD };
do not initialize { section .noinit, section .bss, section .data, section __DLIB_PERTHREAD, section .customSection };

place at address mem: m_interrupts_start { readonly section .intvec };
place in m_flash_config_region { section FlashConfig };
place in TEXT_region { readonly };
place in TEXT_region { block __CODE_ROM };
place in DATA_region { block RW };
place in DATA_region { block __CODE_RAM };
place in DATA_region_2 { first block customSectionBlock };
place in DATA_region_2 { block ZI };
place in DATA_region_2 { last block HEAP };
place in CSTACK_region { block CSTACK };
place in m_interrupts_ram_region { section m_interrupts_ram };

[Robin_Shen]

Hi

It looks like you are referring the following article:
HOWTO: Export S32DS Project to IAR EW (S32K14x/S32K11x)
HOWTO: Install IAR Eclipse plug-in into S32 Design Studio for ARM
HOWTO: Install IAR Eclipse plug-in into S32 Design Studio 3.4

Please tell me which version of S32DS and IAR are you using, and are you using S32K1 SDK or RTD?

If you are using S32K1 RTD, it is recommended to refer to: S32K146 downloading error in IAR

Best Regards,
Robin
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[JunnyKim]

Hi Robin,

We are using S32DS_ARM_v2.2 and IAR Toolchain for Arm 9.x, and we are using the S32K1 SDK.
If there is any document or information I can refer to solve this problem, please share it.

Best Regards,
Junny

[Robin_Shen]

Hi Junny,

Current version of S32DS for ARM 2.2 supports IAR compilers v7.x and v8.x.
Current version of S32DS 3.4 supports IAR compilers v9.x.  

Sorry, I encountered problems when installing http://eclipse-update.iar.com/arm/9.10/ on my S32DS for ARM2.2. How did you install it?
Are you considering installing IAR9.x on S32DS v3.4? HOWTO : Install IAR Eclipse plug-in into S32 Design Studio 3.4

S32K1 SDK RTM 4.0.3 fixes known bugs.

Best Regards,
Robin