ADC DMA software trigger

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ADC DMA software trigger

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linglei_meng
Contributor II

S32K148 -> 144 LQFP

Hi community

while(1)

{

    ADC_DRV_ConfigChan(INST_ADCONV1, 0U, &adConv1_ChnConfig0);

    OS_Sleep(100);

}

Example 1 (OK): It Can touch the DMA,void DMA_ADC1_CHANNEL1(void *parameter, edma_chn_status_t status).

 

 

while(1)

{

    ADC_DRV_ConfigChan(INST_ADCONV1, 3U, &adConv1_ChnConfig0);

    OS_Sleep(100);

}

Example 2(NG): It Cann't touch the DMA,void DMA_ADC1_CHANNEL1(void *parameter, edma_chn_status_t status).

 

Could you please help me to see what the problem is

 

 

#include "dmaController1.h"

edma_state_t dmaController1_State;

edma_chn_state_t dmaController1Chn0_State;

edma_chn_state_t dmaController1Chn1_State;

edma_chn_state_t * const edmaChnStateArray[] = {
&dmaController1Chn0_State,
&dmaController1Chn1_State
};

edma_channel_config_t dmaController1Chn0_Config = {
.channelPriority = EDMA_CHN_DEFAULT_PRIORITY,
.virtChnConfig = EDMA_CHN0_NUMBER,
.source = EDMA_REQ_ADC0,
.callback = DMA_ADC0_CHANNEL0,
.callbackParam = NULL,
.enableTrigger = false
};
edma_channel_config_t dmaController1Chn1_Config = {
.channelPriority = EDMA_CHN_DEFAULT_PRIORITY,
.virtChnConfig = EDMA_CHN1_NUMBER,
.source = EDMA_REQ_ADC1,
.callback = DMA_ADC1_CHANNEL1,
.callbackParam = NULL,
.enableTrigger = false
};
const edma_channel_config_t * const edmaChnConfigArray[] = {
&dmaController1Chn0_Config,
&dmaController1Chn1_Config
};

const edma_user_config_t dmaController1_InitConfig0 = {
.chnArbitration = EDMA_ARBITRATION_FIXED_PRIORITY,
.haltOnError = false
};

/* END dmaController1. */

 

 

 

#include "adConv1.h"

/*! adConv1 configuration structure */
const adc_converter_config_t adConv1_ConvConfig0 = {
.clockDivide = ADC_CLK_DIVIDE_1,
.sampleTime = 13U,
.resolution = ADC_RESOLUTION_12BIT,
.inputClock = ADC_CLK_ALT_1,
.trigger = ADC_TRIGGER_SOFTWARE,
.pretriggerSel = ADC_PRETRIGGER_SEL_PDB,
.triggerSel = ADC_TRIGGER_SEL_PDB,
.dmaEnable = true,
.voltageRef = ADC_VOLTAGEREF_VREF,
.continuousConvEnable = false,
.supplyMonitoringEnable = false,
};

const adc_chan_config_t adConv1_ChnConfig0 = {
.interruptEnable = false,
.channel = ADC_INPUTCHAN_EXT26,
};

const adc_chan_config_t adConv1_ChnConfig1 = {
.interruptEnable = false,
.channel = ADC_INPUTCHAN_EXT26,
};

const adc_chan_config_t adConv1_ChnConfig2 = {
.interruptEnable = false,
.channel = ADC_INPUTCHAN_EXT26,
};

const adc_chan_config_t adConv1_ChnConfig3 = {
.interruptEnable = false,
.channel = ADC_INPUTCHAN_EXT26,
};

const adc_chan_config_t adConv1_ChnConfig4 = {
.interruptEnable = false,
.channel = ADC_INPUTCHAN_EXT26,
};

const adc_chan_config_t adConv1_ChnConfig5 = {
.interruptEnable = false,
.channel = ADC_INPUTCHAN_EXT26,
};

const adc_chan_config_t adConv1_ChnConfig6 = {
.interruptEnable = false,
.channel = ADC_INPUTCHAN_EXT26,
};

const adc_compare_config_t adConv1_HwCompConfig0 = {
.compareEnable = false,
.compareGreaterThanEnable = false,
.compareRangeFuncEnable = false,
.compVal1 = 0U,
.compVal2 = 0U,
};

const adc_average_config_t adConv1_HwAvgConfig0 = {
.hwAvgEnable = false,
.hwAverage = ADC_AVERAGE_4,
};

 

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1 Solution
217 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

Hi linglei_meng,

In Software Trigger mode (when SC2[ADTRG]=0), writes to SC1A initiate a new conversion.
None of the SC1B-SC1n registers are used for software trigger operation.

ADC Status and Control Register 1 (SC1A - aSC1P).png

When using ADC_DRV_ConfigChan you should notice it: When Software Trigger mode is enabled, configuring control channel index 0, implicitly triggers a new conversion on the selected ADC input channel.

ADC_DRV_ConfigChan.png

Best Regards,
Robin
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2 Replies
218 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

Hi linglei_meng,

In Software Trigger mode (when SC2[ADTRG]=0), writes to SC1A initiate a new conversion.
None of the SC1B-SC1n registers are used for software trigger operation.

ADC Status and Control Register 1 (SC1A - aSC1P).png

When using ADC_DRV_ConfigChan you should notice it: When Software Trigger mode is enabled, configuring control channel index 0, implicitly triggers a new conversion on the selected ADC input channel.

ADC_DRV_ConfigChan.png

Best Regards,
Robin
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

View solution in original post

209 Views
linglei_meng
Contributor II

Thank you !

Your reply is very helpful to me, and the question reply is accurate and effective.

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