Dear Community,
I am currently working on an ADC data acquisition project using the S32K3 MCU with EB Tresos 28.2 and RTD 4.4.2.(The version will definitely be updated in the future). My objective is to sample ADC1 channel S12CH35 (for motor current measurement) every 100 µs, while other channels on ADC1 are sampled at 1 ms intervals.
Based on prior recommendations (e.g., leveraging combined software and hardware triggers for distinct conversion types within the same ADC instanceS32K344 use both hw normal and hw injected trigger for an ADC instance ), I implemented the following configuration:
1 ms sampling uses software triggering (SW).
100 µs sampling employs hardware triggering via BCTU with EMIOS_0_21.
While I successfully retrieved sampled data from the registers, I face a critical challenge: There is no efficient path to access the 100 µs sampled data without relying on periodic function calls. Although I attempted to use a PIT timer (triggered every 100 µs) to read the data, this approach results in excessive CPU load and is impractical for sustained operation.
Code screenshot:
Adc_SetupResultBuffer(AdcGroup_ADC2, ADC2_GroupBuffer);
Adc_EnableCTUTrigger(AdcGroup_ADC2, AdcHwTrigger_1);
Adc_ReadGroup(AdcGroup_ADC2, ADC2_ResultGroupBuffer);
/* Read data fromm Register */
iha_adc_rawval.group1.v_bat_mV = ((AdcBasePtr1->ICDR[4U] & 0xFFFFU) >> 3U)
Is there any way to solve the above problems?
Best regards,
Dongxun
Hello @dongxun ,
To achieve efficient 100 µs ADC sampling on S32K3 without burdening the CPU, I recommend using DMA to transfer conversion results directly from the BCTU_ADC_DATA_REG to a memory buffer.
There is an example available on NXP Community Example S32K312 PIT BCTU ADC DMA with RTD 3.0.0 . If you're using RTD 4.4.2, the configuration steps should be similar, though some register names or macros might differ slightly.
There is also another example Solved: S32K312 - Multiple ADC conversion read with DMA - NXP Community .
Best regards,
Pavel