S32K Knowledge Base

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S32K Knowledge Base

Labels

Discussions

Sort by:
******************************************************************************** * Detailed Description: * RAM self-test is performed after reset in startup_S32K144.s file. * The RAM self-test should be executed right after reset, so it does not destroy * data loaded to RAM by init functions. The code is inserted after * initialization of core registers. RAM initialization is commented out because * the same operation is done by the self-test. * The test flow is: * 1. Write pattern 0x55AA55AA to first word in RAM * 2. Read the data back * 3. Compare the data and increment error counter if not equal * 4. Write inverse pattern 0xAA55AA55 to first word in RAM * 5. Read the data back * 6. Compare the data and increment error counter if not equal * 7. Clear the first word in RAM to leave whole RAM erased to ‘0’ at the end of test * This procedure is repeated for whole RAM. * If the error counter is different from zero at the end, the program stays in * endless loop until watchdog reset. * * ------------------------------------------------------------------------------ * Test HW:         S32K144EVB-Q100 * MCU:             FS32K144UAVLL 0N57U * Fsys:            Default * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * ********************************************************************************
View full article
******************************************************************************** Detailed Description: Configures the FlexCAN 0 to transmit and receive message into RXFIFO. LOOPBACK mode is enabled. Two IDs are set into RXFIFO ID table. DMA is configured to read the message from RXFIFO. Within DMA major interrupt the new message is send according to which Identifier Acceptance Filter was hit. ------------------------------------------------------------------------------  Test HW:         S32K144 EVB-Q100  MCU:             PS32K144HFVLL 0N77P  Fsys:            160MHz  Debugger:        Lauterbach  Target:          internal_FLASH ******************************************************************************** Revision History: 1.0     Sep-4-2017     Petr Stancik    Initial Version *******************************************************************************
View full article
******************************************************************************** * Detailed Description: * * This example shows how to use the back-to-back mode of the PDB to trigger * sequence of ADC channels conversion. 4 PDB channel pre-triggers/triggers are * generated upon single PDB SW trigger. The first trigger is started by the PDB, * no delay is used. Next 3 triggers start after corresponding acknowledgment is * received from ADC. * * DMA is configured to read the ADC result registers. * Within DMA major interrupt the new conversion scan is started via PDB SW request. * * Converted data is used to change color of the EVB led based on Trimmer position. * * ------------------------------------------------------------------------------ * Test HW:         FRDM-S32K144 * MCU:             PS32K144HFVLL 0N77P * Fsys:            160MHz * Debugger:        S32DS * Target:          internal_FLASH * ********************************************************************************
View full article
********************************************************************************  Detailed Description:  Example shows how to use FlexCAN 0 Pretended networking mode to allow FlexCAN  module to wake up MCU from STOP mode.  Wake up by Timeout and wake up by Match events are enabled.  Also pin interrupt can be used to exit STOP mode.  So MCU enters STOP mode by pressing SW3 button.  MCU exits STOP mode when one of following happens:  - no CAN message comes in 8sec (CAN PN timeout event)  - message with standard ID 0x554 or 0x555 comes (CAN PN match event)  - SW2 button is pressed (PTC12 interrupt)  In run mode blue LED is dimming and the rate is different for each wakeup event  ------------------------------------------------------------------------------  Test HW: S32K144 EVB-Q100  MCU: FS32K144UAVLL 0N57U  Fsys: 160MHz  Debugger: Lauterbach, OpenSDA  Target: internal_FLASH ********************************************************************************
View full article
****************************************************************************************************************** Detailed Description: The example code shows CMP in Round-robin mode. CMP is clocked (125kHz) and triggered (80ms) by LPTMR, operates in VLPS. Input channels are CMP0_IN1 (PTA1), CMP0_IN2 (PTC4), CMP0_IN3 (PTE8), CMP0_IN4 (PTC3). The initial state of CMP outputs is 0 (Input analog pins < DAC input (Vin1/2)) The input pins are pulled down internally for debugging purposes. CPM will wake up the MCU if an input has changed. BLUE LED flashes 1x if CMP_IN1 has changed, 2x CMP0_IN2, 3x CMP0_IN3, 4x CMP0_IN4. After that, the MCU goes back to VLPS. ------------------------------------------------------------------------------------------------------------------------------------- Test HW: S32144EVB-Q100X MCU: S32K144 (0N47T) Debugger: S32DS2.0, OpenSDA Target: internal_FLASH ******************************************************************************************************************
View full article