Application note AN5258 for the S32K1 describes how to implement external pulse counting using DMA and PORT modules. Referring to that application note, we will implement a similar function using SIUL2 and DMA on the S32K3.
1. Introduction
This article describes how to perform pulse counting using Enhanced Direct Memory Access (eDMA) and the SIUL2 module on a 32-bit automotive MCU in the S32K3 series.
Typically, signal pulses can be counted using the eMios module; however, eMios can also be used for PWM output, ICU, OCU, and GPT. If resources available for eMios are insufficient, consider using the SIUL2 and DMA modules to implement external pulse counting.
In this note, the SIUL2 module will be used to capture multiple pulse inputs, and the current major loop iteration count(CITER) register of the eDMA channel will be used as a pulse counter.
2. SIUL2 supports DMA triggering.
SIUL2, or System Integration Unit Lite2, is primarily responsible for controlling the electrical attributes, multiplexing functions, GPIO, EIRQ, etc., of external pins.
For the S32K3, SIUL2 functions can be categorized as follows:
- Pin mux/pad control: Configures MSCR, IMCR, etc.
- GPIO input/output: Typically used via Siul2_Dio/Siul2_Port drivers.
- External interrupt EIRQ: Only pins with the EIRQn option support SIUL2 external interrupts.
- DMA is triggered by external edge events.
When using SIUL2 pins to trigger DMA, note that:
SIUL2 EIRQ[0-15] can be used for interrupt requests or DMA requests, while EIRQ[16-31] can only be used for interrupt requests.
In other words, the SIU2L module can support up to 16 external edge events triggering DMA.
The file "S32K3xx_IOMUX.xlsx" can be found in the datasheet appendix.
3. Basic Event Chain for SIUL2 Triggered DMA
SIUL2 external events still rely on the EIRQ path: a pad needs to be connected to the corresponding EIRQ input via IMCR, input buffering needs to be enabled, rising/falling edge detection needs to be configured, and the relevant request needs to be enabled.
In this example, PTB26 is configured as SIUL2 EIRQ13, and external interrupt configuration is completed through registers such as IREER/IFEER and DIRSR.
IP_SIUL2->IREER0 |= (1 << 13); // IREER0[EIRE13] = 1 (Enable Rising Edge)
IP_SIUL2->IFEER0 &= ~(1 << 13); // IFEER0[EIRE13] = 1 (Enable Falling Edge)
IP_SIUL2->DIRSR0 |= (1 << 13); // Select DMA Request for PTB26The above bare-metal code clearly shows how to configure the Siul2 module to trigger DMA.
However, if using RTD, note that：
the current "Siul2_Icu" driver does not support configuring the DMA option.
Therefore, when using the "Siul2_Icu" component, you also need to manually add and modify the "DIRSRx" bit to 1, i.e., select to enable "DMA request".
SIUL2->DIRSR0 |= (1<<13);/* Select DMA Request for PTB26 */
4. DMAMUX / RM Configuration
After a DMA request is generated on the SIUL2 side, the request source needs to be connected to a DMA channel via DMAMUX.
This path is described in “S32K3xx_DMAMUX_map.xlsx”:
1.EIRQ[0 ~ 7] corresponds to 1 to 7 of DMAMUX0 Source, and EIRQ[8 ~ 15] corresponds to 1 to 7 of DMAMUX1 Source.
2.TCD 0 ~ 15 can be configured with any channel corresponding to EIRQ[0 ~ 7], and TCD 15 ~ 31 can be configured with any channel corresponding to EIRQ[8 ~ 15].
eDMA is mainly used for data transfer between main memory and other peripheral register spaces without CPU intervention.
Upon receiving a peripheral request, the eDMA module's second loop begins basic data transfer. We set an empty transfer; each time SIUL2 triggers DMA, an empty transfer is performed, and the CITER bit is decremented accordingly. At this time, the value of the CITER register reflects the actual pulse count.
Based on the above principle, we can calculate the pulse count or pulse frequency by periodically reading the CITER register.
Note:
The CITER register can only hold a maximum of 15 bits of data. Check the CITER register each time you read it to ensure its value is not zero. When the CITER register is zero, CITER will reload its value from the BITER register and continue decrementing.
5. Example Project Demonstration
This example program is based on the S32K344, using RTD version 7.0.1.
It implements the function of acquiring the pulse frequency input from PTB26, PTA18, and PTA19 pins.
1.The timer is set to 1 second; the count value read in 1 second can be directly used as the measured frequency.
2. The maximum value of the CITER register is 0x7FFF, or 32767. When the count value exceeds 0x7FFF, the register will be reloaded with an initial value of 0x7FFF..
3. CITER triggers a DMA interrupt during reload. "g_DmaChx_CallbackCounter" can be used to record the number of overflow reloads.
4. Based on CITER and "g_DmaCh16_CallbackCounter", high-frequency pulse input counting can be achieved.
5. To measure an input frequency of 40kHz, connect the signal generator's output signal to PTB26, PTA18, and PTA19.
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6. Test result in S32 DS.
Senlent_1-1787211927621.png
Using the Siul2 module to trigger DMA for counting is a very efficient method, but it should be noted that if other eDMA transfers are enabled in your application, more testing is required to ensure stable execution of all eDMA channels.
