This example project will show user how to use and configure the basic functionalities of WKPU + SIUL2.
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* Test HW: S32K312EVB-Q172 (SCH-50892 REV B)
* MCU: S32K312
* IDE: S32DS v3.5 & S32DS v3.6.x
* SDK release: RTD 6.0.0
* Debugger: PE Micro
* Target: internal_FLASH
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This example routine configures the WKPU unit for a GPIO interrupt wake-up and defines a section in linker file for 32KB of Standby RAM.
How to use Standby RAM?
- Modify the linker file to separatethe 32KBstandby RAM(0x2040 0000 ~0x2040 8000) from int_sram memory region, and place standby .bss and .data or .text sections into the new region as well as adjust the link address symbols for customized initialization during startup.
- Initialize the standby RAM only if it’s Power-On Reset.
- Use key word attribute to define the variable/function in relevant memory section.
Counter variable is placed in standby ram section:
__attribute__ ((section (".sram_standby_bss"))) volatile int RunStandbyCounter0 = 0;Linker file (.ld) must be modified accordingly. Standby sections and link address symbols must be placed:
MEMORY
{
int_pflash : ORIGIN = 0x00400000, LENGTH = 0x001D4000 /* 2048KB - 176KB (sBAF + HSE)*/
int_dflash : ORIGIN = 0x10000000, LENGTH = 0x00020000 /* 128KB */
int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00008000 /* 32KB */
int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x0000F000 /* 60KB */
int_stack_dtcm : ORIGIN = 0x2000F000, LENGTH = 0x00001000 /* 4KB */
int_standbysram : ORIGIN = 0x20400000, LENGTH = 0X00000100 /* standby ram 256B*/
int_sram : ORIGIN = 0x20400100, LENGTH = 0x00007E00 /* 32KB - 0x100, needs to include int_sram_fls_rsv*/
int_sram_fls_rsv : ORIGIN = 0x20407F00, LENGTH = 0x00000100
int_sram_no_cacheable : ORIGIN = 0x20408000, LENGTH = 0x00007F00 /* 32KB , needs to include int_sram_results */
int_sram_results : ORIGIN = 0x2040FF00, LENGTH = 0x00000100
int_sram_shareable : ORIGIN = 0x20410000, LENGTH = 0x00008000 /* 32KB */
ram_rsvd2 : ORIGIN = 0x20418000, LENGTH = 0 /* End of SRAM */
}
...
.sram_standby (NOLOAD):
{
. += ALIGN(4);
*(.sram_standby_bss)
} > int_standbysram
...
__STANDBY_SRAM_START = ORIGIN(int_standbysram);
__STANDBY_SRAM_SIZE = LENGTH(int_standbysram);Note 1: RAM ECC must be initialized only if it’s Power-on Reset.
Note 2: CM7 CPU D-Cache MUST be disabled to use the Standby RAM area. Or set the standby RAM(0x2040 0000 ~0x2040 8000) as non-cacheable in MPU configuration.
The routine waits for SW5 to be pressed, then turns off the green LED, and enters Wkpu_EnterStandby() function which:
- Disables D-Cache.
- Initializes RAM ECC (if reset was Power-on Reset).
- Adds +1 to the standby counter placed in Standby RAM.
- Switches core clock to FIRC.
- Initializes the WKPU instance.
- Configures WKPU42 (PTB19).
- Enters standby.
If SW6 is pressed, MCU will perform a software reset through the Power_Ip_PerformReset() API. After wake-up, MCU resets and polls for SW5 to be pressed again.
In this application, LPUART6 (connected to USB OpenSDA interface) is enabled and will show previous reset reason (external reset, power-on reset, wakeup, functional reset), as well as printing standby counter between resets/standby cycles.
Connect a USB cable to J40, and open a Serial terminal on PC for the serial device with these settings:
- 9600 baud rate
- No parity
- One stop bit
- No flow control
After either a SW reset, or a wake-up cycle, the standby counter will increase. If a destructive reset or Power-on Reset is asserted, the counter is reset.
