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* Detailed Description:
* This example uses BIST and EMCEM drivers from SPD 1.0.6.
* BIST and EMCEM can be enabled or disabled using macros.
*
* BIST runs immediately after a power-on reset and triggers an ST_DONE reset.
* EMCEM initialization is only possible after a system reset without an attached debugger.
* Therefore, wait loops (controlled by macros) are used to manage execution flow
* for both BIST and EMCEM.
*
* Fault injection is selected via macros:
* - FAULT_EMCEM_DCM_NCF_1_AD_EDC_ERR_OUT → handled via NMI
* - FAULT_EMCEM_DCM_NCF_2_PRAM1_MULTI_ERR → handled via BusFault (if INJECT_EIM) and FCCU alarm
* - FAULT_EMCEM_DCM_NCF_2_ITCM_MULTI_ERR → handled via BusFault (if INJECT_EIM) and FCCU alarm
* - FAULT_EMCEM_DCM_NCF_3_PFO_CODE_ERR → FCCU alarm → (if TIMEOUT_PFO_CODE_ERR) → NMI
* - FAULT_EMCEM_DCM_NCF_5_STCU_NCF → handled via FCCU alarm
* - FAULT_EMCEM_DCM_NCF_7_SW_NCF_0 → FOSU Destructive reset
* (read resetReason after reset, MCU_FCCU_FTR_RESET).
* FOSU triggers as no FCCU reaction is configured for NCF_7
* while FCCU is enabled and reactions are configured for other faults.
*
* ------------------------------------------------------------------------------------------------
* MCU: S32K3x4EVB-Q257
* Fsys: 160 MHz PLL with 16 MHz crystal reference
* Debugger: Lauterbach Trace32, S32DS IDE 3.6.5
* Target: internal_FLASH
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