dwmac eth0 failed to enable PTP reference clock: -EIO with SDK BSP43 release on RDB3

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dwmac eth0 failed to enable PTP reference clock: -EIO with SDK BSP43 release on RDB3

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hittzt
Senior Contributor I

Hi,

 

I tested SDK BSP43 release on RDB3 board, and I found that, the ptp reference clock enabled failed with the following message:

root@s32g399ardb3:~# dmesg | grep dwmac
[ 4.850647] s32cc-dwmac 4033c000.ethernet: IRQ eth_wake_irq not found
[ 4.857202] s32cc-dwmac 4033c000.ethernet: IRQ eth_lpi not found
[ 4.863640] s32cc-dwmac 4033c000.ethernet: User ID: 0x10, Synopsys ID: 0x52
[ 4.870727] s32cc-dwmac 4033c000.ethernet: DWMAC4/5
[ 4.875779] s32cc-dwmac 4033c000.ethernet: DMA HW capability register supported
[ 4.883209] s32cc-dwmac 4033c000.ethernet: RX Checksum Offload Engine supported
[ 4.890637] s32cc-dwmac 4033c000.ethernet: TX Checksum insertion supported
[ 4.897623] s32cc-dwmac 4033c000.ethernet: Wake-Up On Lan supported
[ 4.904030] s32cc-dwmac 4033c000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[ 4.911992] s32cc-dwmac 4033c000.ethernet: Enabled L3L4 Flow TC (entries=8)
[ 4.919068] s32cc-dwmac 4033c000.ethernet: Enabled RFS Flow TC (entries=10)
[ 4.926150] s32cc-dwmac 4033c000.ethernet: Enabling HW TC (entries=256, max_off=256)
[ 4.934023] s32cc-dwmac 4033c000.ethernet: Using 32/32 bits DMA host/device width
[ 9.792490] s32cc-dwmac 4033c000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
[ 9.792794] s32cc-dwmac 4033c000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-1
[ 9.793051] s32cc-dwmac 4033c000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-2
[ 9.793314] s32cc-dwmac 4033c000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-3
[ 9.793585] s32cc-dwmac 4033c000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-4
[ 9.861296] s32cc-dwmac 4033c000.ethernet eth0: PHY [stmmac-0:01] driver [Micrel KSZ9031 Gigabit PHY] (irq=POLL)
[ 9.870824] dwmac4: Master AXI performs any burst length
[ 9.870966] s32cc-dwmac 4033c000.ethernet eth0: Enabling Safety Features
[ 9.871048] s32cc-dwmac 4033c000.ethernet eth0: failed to enable PTP reference clock: -EIO
[ 10.076859] s32cc-dwmac 4033c000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported
[ 10.077137] s32cc-dwmac 4033c000.ethernet eth0: registered PTP clock
[ 10.077554] s32cc-dwmac 4033c000.ethernet eth0: FPE workqueue start
[ 10.077567] s32cc-dwmac 4033c000.ethernet eth0: configuring for phy/rgmii-id link mode
root@s32g399ardb3:~# uname -a
Linux s32g399ardb3 6.6.52-rt43-g1a29a32be610 #1 SMP PREEMPT Thu Nov 21 09:35:09 UTC 2024 aarch64 aarch64 aarch64 GNU/Linux
root@s32g399ardb3:~#

 

But if the pfe enabled, the failure message will disappear. I checked source codes, but it seems relate with atf codes, not the kernel codes.

Would you please help to check this issue?

 

Thanks,

Zhantao

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chenyin_h
NXP Employee
NXP Employee

Hello, @hittzt 

Thanks for your patience.

With further checking with internal teams, it is confirmed to be a bug and is planned to be fixed in the following BSPs.

 

BR

Chenyin

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1,641 Views
chenyin_h
NXP Employee
NXP Employee

Hello, @hittzt 

Thanks for your detailed description on the issue, sure, I will also check on it.

May I know if there are any actual impact on your project? maybe you need to use the 1588 of GMAC0 without PFE enabled?

 

BR

Chenyin

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1,637 Views
hittzt
Senior Contributor I

Hi @chenyin_h,

 

Oh, yes, the pfe is a optional feature currently, I may use only gmac0's 1588 of the board without the pfe feature.

 

Thanks,

Zhantao

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chenyin_h
NXP Employee
NXP Employee

Hello, @hittzt 

Thanks for the post.

From my opinion, the GMAC PTP clock may use the corresponding clock of PFE, which caused such prints:

 

chenyin_h_1-1742271616111.jpeg

 

BR

Chenyin

 

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1,681 Views
hittzt
Senior Contributor I

Hi @chenyin_h,

 

Thanks for your reply.

I know the point you said, but it seems not the reason of the issue.

Your image is the hardware relationship, not the codes's.

And the root cause seems in the following commits of arm-trusted-firmware codes:

From a43c123995a95de12f5cd1e5eacb6af9f6a84993 Mon Sep 17 00:00:00 2001
From: Andrei Botila <andrei.botila@nxp.com>
Date: Mon, 22 Jul 2024 10:24:24 +0300
Subject: [PATCH 83/98] s32cc: clocks: add GMAC MII support

Enable Tx clock for GMAC MII mode. Also set the necessary
Tx and Rx clock for it.

Issue: ALB-10056

Signed-off-by: Andrei Botila <andrei.botila@nxp.com>
 
and
 
From 718663a00e7691f0959a748a75c0e4c665703c19 Mon Sep 17 00:00:00 2001
From: Andrei Botila <andrei.botila@nxp.com>
Date: Mon, 22 Jul 2024 10:24:37 +0300
Subject: [PATCH 84/98] s32cc: clocks: add GMAC RMII support

Enable GMAC RMII mode. Also set the necessary Tx and Rx
clock for it.

Issue: ALB-10056

Signed-off-by: Andrei Botila <andrei.botila@nxp.com>
 
If revert these two commits, then the issue will be disappeare.
 
So would you please help to check it again and give a fix or workaroud?
And I will keep working to find a way to fix it too.
 
Thanks,
Zhantao
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