SPI function in multiple core

[tony_green]

Hello, NXP engineers. Currently, I am using the S32 Design to configure a multi-core project for the S32G399A. My main intention is to test the SPI function. However, during the use process, the status of the SPI function is 'failed'. Can you confirm which configuration part has an issue?

[Joey_z]

hi,tony_green

Thank you for contacting us.

Could you share more information?

How do you boot multiple core?  are you using  RDB3?

BR

Joey

[tony_green]

hi, joey_z, what i used is RDB3, and i can shared the configuration in s32 and the code in main.c file, can u help me to find the error in program.

[Joey_z]

hi，tony_green

Thank you for your information.

Do you mean that 1 succeeded but 2 failed, right?
Or is the status of the seqStatus return value incorrect?

BR

Joey

[tony_green]

hello, joey_z , when i run this code, the sequence is pending (what i mean is 1) and at the same time, the status of Spi_JobResultType also is pending.

I want to ask a clear question about mcl_init (), why this function can't be called in the multi-core version, but it can be called in the default spi project, and it can enter the interrupt mode normally. How should I debug it later to use the spi function in the multi-core version? As mentioned above, the current state is all in the pending state.

[Joey_z]

hi，tony_green

Thank you for your reply.

It should have some conflicts between A core and M core, if The mcl_init () can not use in multi-core. I checked the mcl_init () function in SPI demo, it not be use for some function. Have you added the DMA support to mcl_init ()?  Please check whether the resources conflict. Or there are different configurations for the same peripheral on multiple cores.

BR

Joey

[tony_green]

hello, joey_z. As u guess, I added DMA to mcl, but it worked normally in single-core mode before. The DMA of multi-core is the same as the original one, Why can't this project enter the interrupt and call mcl_init () function?

[Joey_z]

hi，tony_green

Thank you for your infomation.

It is recommended to remove the relate DMA initial/using in Multi core. It is mothed to devoid the conflict.

BR

Joey

[tony_green]

hi, joey_z, thanks for u reply. At present, I have configured two spi interfaces, how to confirm which spi sent the information and how to write main.c；; At the same time, in the multi-core version, the spi function of core0 can be triggered normally, but the spi function of core1 cannot be triggered. Is it related to the interrupt and how to change it? Thank you ~

[Joey_z]

hi，tony_green

Thank you for your information

Do you want to have two SPI interface on core0? 

In addition, you can try to use the Mcl_Init function only one core. 

Hope it can help you.

BR

Joey

[tony_green]

hi, joey_z. I use spi function in two cores respectively. At present, I can send spi data separately. When using DMA interrupt mode, the host can't receive the data sent by the slave completely, but only the last bit of data sent by the slave. How to check this? Should I change the DMA configuration?

[Joey_z]

hi,tony_green

Thank you for your information.

Could you share your M core project and bootloader, I will help you to check it.

BR

Joey

[tony_green]

hello, joey_z . The attachment is the project I have configured. At present, the problems I have encountered are as follows:

1. In DMA mode, the slave sends data to the host, but the host cannot receive the data;

2. In spi interrupt mode, there will be a problem that one spi can send data, but the other SPI cannot.

3. When using multi-core spi, what is the startup sequence? I usually start multi-core at the same time, and then run core 0 and then Core 1.

4. Is there any conflict between the data sent by multiple spi in the multi-core version? I send a fixed number of multi-core spi data at different rates, but there is always loss. How should I check or solve it?
Thank you for your support and help.

[Joey_z]

hi,

Thank you for your information.

The multiple core project and startup sequence be recommended to refer the AN13750 (https://www.nxp.com.cn/webapp/sps/download/preDownload.jsp?render=true).

Perhaps you just ran a single-core program.

BR

Joey

[tony_green]

hi, joey_z. Opps, some errors have occurred and I can't download this file.

[Joey_z]

hi,tony_green

You can try to download on official website of S32G. It is as shown the following picture. 

(S32G2 Vehicle Integration Platform | NXP Semiconductors)

BR

Joey