S32G RTC slowly

[StanleyShen]

Hi 

After I set the system clock and synchronized it to the RTC clock,

I found that the RTC clock would become slower and slower.

Could you tell me the reason?

It seems that the hardware is rtc-pcf85063.

Env.

CPU: S32G274A

BSP: 33.0

Yocto Machine：fsl-image-base

root@(none):~# date -s "2023-03-08 10:52:10"
root@(none):~# hwclock -w

root@(none):~# date && hwclock
Wed Mar  8 10:55:12 UTC 2023
Wed Mar  8 10:55:01 2023  0.000000 seconds
root@(none):~# date && hwclock
Wed Mar  8 10:55:20 UTC 2023
Wed Mar  8 10:55:10 2023  0.000000 seconds
root@(none):~# date && hwclock
Wed Mar  8 10:56:38 UTC 2023
Wed Mar  8 10:56:23 2023  0.000000 seconds
root@(none):~# date && hwclock
Wed Mar  8 10:56:40 UTC 2023
Wed Mar  8 10:56:25 2023  0.000000 seconds
。。。
root@(none):~# date && hwclock
Wed Mar  8 11:03:11 UTC 2023
Wed Mar  8 11:02:34 2023  0.000000 seconds
root@(none):~# date && hwclock
Wed Mar  8 11:06:32 UTC 2023
Wed Mar  8 11:05:44 2023  0.000000 seconds
root@(none):~# date && hwclock
Wed Mar  8 11:06:35 UTC 2023
Wed Mar  8 11:05:48 2023  0.000000 seconds

[MayanksPatel]

Hi @StanleyShen,

Hope you are doing well.

The RTC shouldn’t be used as a hardware clock due to the clock that is used for its counters. The FIRC clock powers it on all NXP boards. We set FIRC’s reference frequency to 51MHz due to possible drifts caused by temperature variations (see BootROM_Clocking spreadsheet, part of S32G_boot_settings.xlsx, attached to the Reference Manual).  This is the main cause of the RTC imprecision, but it is expected. The RTC drift will be less observable if considering the FIRC running at 48 MHz, at room temperature, but this might not apply to other temperature ranges.

An external RTC module must be used for better precision. PCA85073A modules have been integrated on S32G RDB boards for this purpose. Another option is to use an external clock source for the RTC counters.

Hope this helps.

Thanks,

Mayank s Patel

[StanleyShen · Accepted solution]

Hi Patel

Thanks for you help.

Just recording  to the dmesg Info. , I found two RTC devices:

# dmesg |grep rtc
[    0.924372] s32gen1-rtc 40060000.rtc: registered as rtc0
[    0.929816] s32gen1-rtc 40060000.rtc: setting system clock to 1970-01-01T00:00:00 UTC (0)
[    1.150208] rtc-pcf85063 0-0051: registered as rtc1

 The rtc0 is  default RTC and rtc1 is external RTC, when I was synchronized time to rtc1, 

No matter how long it takes, the time of both soft and hard has always been consistent.

# date -s "2023-03-08 10:52:10" &  hwclock -f /dev/rtc1 -w
# date && hwclock -f /dev/rtc1
Wed Mar  8 10:52:30 UTC 2023
2023-03-08 10:52:31.201735+00:00
。。。
# date && hwclock -f /dev/rtc1
Wed Mar  8 11:00:39 UTC 2023
2023-03-08 11:00:40.426119+00:00

if considering the FIRC running at 48 MHz

By default, it seems that the frequency  is 48 MHz

(linux-bsp33.0-5.10.109-rt/linux/arch/arm64/boot/dts/freescale/s32cc.dtsi )

[MayanksPatel]

Hi @StanleyShen,

Thanks for the update.

[MayanksPatel]

Hi @StanleyShen ,

Thank you for reaching out to NXP.

I am working on this ticket and already started discussion with internal engineering team.

I will get back to you once anything comes.

Thanks,

Mayank s Patel

[StanleyShen]

Hi 

Can anyone help me?