What you were attempting was the sequence in Rev 3 of the RM, which has been updated in Rev 4.
Rev 4 has still to be formally released but the new sequence is :
By default, lower frequency operation, a fixed sampling clock is used to receive signals on CMD and DAT[3:0]. Before using the
HS200, HS400, SDR104, or SDR50 modes, the Host Driver executes the tuning procedure at the mode switch sequence.
- Issue uSDHC SW reset, set SYS_CTRL[RSTT] to 1.
- Set VEND_SPEC[FRC_SDCLK_ON] to 1.
- Set TUNING_CTRL[DIS_CMD_CHK_FOR_STD_TUNING] to 1.
- Set AUTOCMD12_ERR_STATUS[EXECUTE_TUNING] to 0.
- Read AUTOCMD12_ERR_STATUS[EXECUTE_TUNING] to get 0, and then write 1 to clean INT_STATUS[BRR].
- Start the tuning procedure by setting TUNING_CTRL[STD_TUNING_EN] and
AUTOCMD12_ERR_STATUS[EXECUTE_TUNING] to 1.
- Issue CMD19(SD)/ CMD21(eMMC) with the proper Command Transfer Type (CMD_XFR_TYP) and Auto CMD12 Error
Status (AUTOCMD12_ERR_STATUS) settings.
- Wait for uSDHC BRR (Buffer Read Ready) interrupt signal is 1.
- Check AUTOCMD12_ERR_STATUS[EXECUTE_TUNING]. If AUTOCMD12_ERR_STATUS[EXECUTE_TUNING] = 1,
repeat 5~6. If AUTOCMD12_ERR_STATUS[EXECUTE_TUNING] = 0, standard tuning has completed, or the tuning
has not completed within 40 attempts. The Host Driver might abort this loop if the number of loops exceeds 40 or 150ms
timeout occurs. In this case, a fixed sampling clock should be used, (AUTOCMD12_ERR_STATUS[SMP_CLK_SEL] =
0).
- Sampling Clock Select, AUTOCMD12_ERR_STATUS[SMP_CLK_SEL] , is valid after
AUTOCMD12_ERR_STATUS[EXECUTE_TUNING] has changed from 1 to 0.
AUTOCMD12_ERR_STATUS[SMP_CLK_SEL] = 1, indicates tuning procedure passed.
AUTOCMD12_ERR_STATUS[SMP_CLK_SEL] = 0, indicates tuning procedure failed. The tuning result is applied to the
delay chain, CLK Tuning Control and Status (CLK_TUNE_CTRL_STATUS) [30:16], upon successful tuning procedure
completion.
- Clear VEND_SPEC[FRC_SDCLK_ON].
- Set MIX_CTRL[AUTO_TUNE_EN] to 1.
Can you try this out
