LLCE: How to define routing table of ETH2CAN and non-routing frames received by CPU

[RAYL_LAMS]

In the AN13423 document shown ETH2CAN: When the PFE receives the Ethernet frame, LLCE parses it and unpacks the IEEE1722 packet / UDP packet and route it to CAN channels.

As ETH2CAN and CAN2ETH will not involve Host CPU resource, I want to use LLCE as the bridge to route the part of received frames to other devices, other frames shall directly read by Host CPU applications.

Frames --->  ETH  -- <without routing table> --> Host CPU Application

                  -- <with routing table> --> LLCE_CAN

I am not sure is here feature can meet the following features:

1. if data been configured in ETH2CAN routing table, those data will be automatically routing to LLCE_CAN interface.
2. If data is not configured in ETH2CAN routing table, Application shall able to capture those data via Ethernet driver. 

Is any option to configure LLCE route configured AVTP/UDP frame (e.g.Frame ID defined as route to LLCE_CAN ), otherwise frame could be received by PFE Ethernet Driver.

[Daniel-Aguirre]

Hi,

Which S32G variant are you using? Also, which LLCE version are you using?

We see the following information is available under LLCE User Guide:

We do understand that If the path is not routed, should be managed directly by the Host itself, but could be that we are misunderstanding your request.

Please, let us know.

[RAYL_LAMS · Accepted solution]

Hi Daniel,
Thanks for your quickly reply. Currently I use S32G274A and LLCE_1_0_5 for development.
I checked the LLCE firmware User Manual, it seems the LLCE can meet my request.
But as Figure 1.11 in the LLCE firmware, LLCE route the data to PEF by Host SRAM, the size of SRAM is 8Mb. Base on the data exchange performance consideration, questions:
1. what is the maximum bandwidth of the ETH2CAN channel?
2. How to handle ETH2CAN and CAN2ETH concurrency, this two scenario will both use 8M SRAM for data exchange, is here strategy for the resource manage of SRAM to avoid data flow conflict.

Best Regards,
RAY

[Daniel-Aguirre]

Hi,

Below will be some comments on regards of your questions:

1. what is the maximum bandwidth of the ETH2CAN channel?

For the information available, there is no specific information on regards of the bandwidth itself. There is though a test setup that was done with the following setting:

CAN Baud Rate: Arbitration = 1Mbps, Data = 4Mbps

PFE: 1Gbps RGMII

2. How to handle ETH2CAN and CAN2ETH concurrency, this two scenario will both use 8M SRAM for data exchange, is here strategy for the resource manage of SRAM to avoid data flow conflict.

We understand that there are specific buffers which manage the CAN2ETH and ETH2CAN bridge. An example is shown below:

Please, let us know.