How to use other CS of SPI, except for CS0 on s32g274rdb ?

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How to use other CS of SPI, except for CS0 on s32g274rdb ?

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Zzzz1
Contributor II

I connected two mcp2518fd chips on spi5 of s32g274rdb2, with CS0 functioning normally and CS1 failing to initialize. I checked the IO signal table and found that only PCS0 has two input and output modes, while other PCSs only have output modes. Do I have to use GPIO analog CS when using other chips?

Here is my device tree configuration.

dspi5_pins: dspi5_pins {
/* SPI5_SOUT */
dspi5_grp0 {
pinmux = <S32CC_PINMUX(173, FUNC3)>;
output-enable;
slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>;
};
 
/* SPI1_PCS0_O */
dspi5_grp1 {
pinmux = <S32CC_PINMUX(171, FUNC5)>;
output-enable;
input-enable;
slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>;
bias-pull-up;
};
 
/* SPI1_PCS1_O */
dspi5_grp2 {
pinmux = <S32CC_PINMUX(114, FUNC5)>;
output-enable;
slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>;
bias-pull-up;
};
 
/* SPI1_SCK_O */
dspi5_grp3 {
pinmux = <S32CC_PINMUX(175, FUNC4)>;
output-enable;
input-enable;
slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>;
};
 
/* SPI1_SIN */
dspi5_grp4 {
pinmux = <S32CC_PINMUX(174, FUNC0)>;
input-enable;
slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>;
bias-pull-up;
};
 
dspi5_grp5 {
pinmux = <S32CC_PINMUX(1005, FUNC3)>, //SPI5_PCS0_I
<S32CC_PINMUX(1006, FUNC4)>, //SPI5_SCK_I
<S32CC_PINMUX(1007, FUNC3)>; //SPI5_SIN
};
};

&spi5 {
pinctrl-names = "default";
pinctrl-0 = <&dspi5_pins>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
spi-num-chipselects = <2>;
 
 mcp0: mcp2518fd@0 {
 compatible = "microchip,mcp2518fd";
 reg = <0>;
 pinctrl-names = "default";
 pinctrl-0 = <&mcp0_int_pin>;
spi-max-frequency = <10000000>;
        interrupt-parent = <&gpio>;
        interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 
 clocks = <&osc40m>;
 clock-names = "osc";
 };
 
mcp1: mcp2518fd@1 {
compatible = "microchip,mcp2518fd";
reg = <1>;
pinctrl-names = "default";
pinctrl-0 = <&mcp1_int_pin>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio>;
        interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
clocks = <&osc40m>;
clock-names = "osc";
};
};

 

Here is my log information:
mcp251xfd spi5.0 can2: MCP2518FD rev0.0 (-RX_INT -PLL -MAB_NO_WARN +CRC_REG +CRC_RX +CRC_TX +ECC -HD o:40.00MHz c:40.00MHz m:10.00MHz rs:10.00MHz es:0.00MHz rf:10.00MHz ef:0.00MHz) successfully initialized.
[ OK ] Started Network Configuration.
[ 7.979780] s32cc-dwmac 4033c000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
[ 7.990469] mcp251xfd spi5.1 (unnamed net_device) (uninitialized): Failed to read Oscillator Configuration Register (osc=0xffffffff).

Thank you very much!
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chenyin_h
NXP Employee
NXP Employee

Hello, @Zzzz1 

Thanks for your reply.

There are 5 PCS signals supported on SPI5, so it is possible to connect more than 1 SPI devices.

Yes, only PCS0 supports IO

chenyin_h_0-1757045192046.png

May I know exactly the current issues arise? only one spi device could work correctly?(PCS0), while the other one connected could not?(via PCS1)

 

BR

Chenyin

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chenyin_h
NXP Employee
NXP Employee

Hello, @Zzzz1 

Thanks for your reply.

There are 5 PCS signals supported on SPI5, so it is possible to connect more than 1 SPI devices.

Yes, only PCS0 supports IO

chenyin_h_0-1757045192046.png

May I know exactly the current issues arise? only one spi device could work correctly?(PCS0), while the other one connected could not?(via PCS1)

 

BR

Chenyin

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Zzzz1
Contributor II
Thank you for your reply.
I have already resolved the issue. It's because there's a hardware issue.
I tried using PCS and GPIO cs, and both were successful.
Your products are great!

BR,
Zzz
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chenyin_h
NXP Employee
NXP Employee

Hello, @Zzzz1 

Thanks for the post.

Let me directly support it via your another post together.

 

BR

Chenyin

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Zzzz1
Contributor II

Thank you for your reply.
Yes, I reworked the circuit board based on s32g274a-rdb2. On spi5, sja1110 has been removed and replaced with two MCP chips to expand the number of CAN interfaces. Can I get your support ?

BR,

Zzz

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