How to runtime read DDR clock rate

[GG0712]

Hi NXP team,

I using s32g399ardb3 and BSP35.

How can I runtime access DDR clock rate?

Does S32G3 maximum DDR clock rate is DDR4-3200?

How can I adjust DDR clock rate?

root@s32g399ardb3:~# cat /sys/kernel/debug/clk/clk_summary 
            | enable | prepare | protect           |          |       | duty
clock       | count  | count   | count | rate      | accuracy | phase | cycle
ddr_axi     | 0      | 0       | 0     | 800000000 | 0        | 0     | 50000
ddr_pll_ref | 0      | 0       | 0     | 800000000 | 0        | 0     | 50000
ddr_reg     | 0      | 0       | 0     | 132206143 | 0        | 0     | 50000

root@s32g399ardb3:~# lshw 
s32g399ardb3 
description: Computer
product: NXP S32G399A-RDB3
width: 64 bits
capabilities: smp tagged_addr_disabled
...
...
...
*-memory
description: System memory
physical id: c
size: 3415MiB

Thanks

[chenyin_h · Accepted solution]

Hello, @GG0712 

Thanks for your post.

1. Yes, from the RM, the maximum DDR clock rate supported is DDR4-3200

2. The DDR clock is set via the code in TFA, you may try adjusting it via the TFA

BR

Chenyin

[GG0712]

Hi @chenyin_h ,

Our HW team measure the clock rate is 1600 MHz

But from my previous post, the clock rate of ddr_pll_ref is 800 MHz

Does this correct?

Thanks

[chenyin_h]

Hello, @GG0712 

Thanks for your reply.

Yes, it is correct, within the internal DDR PHY the DDR_CLK will be doubled and therefore the outputted DRAM clock frequency is DDR_CLK multiplied with 2, which would be 800*2=1600Mhz.

BR

Chenyin 

[GG0712]

Hi @chenyin_h ,

According what you said.

Can I understand that DDR clock rate is 1600 MHz and data rate is 3200 MHz ?

Thanks

[chenyin_h]

Hello, @GG0712 

Thanks for your reply.

Yes, I agree with you, the data rate is 3200MT/s per my understanding.

BR

Chenyin