Hit HardFault when Debugging with Lauterbach on S32G

[chaoping]

Hello, NXP support.

I setup a FLB image according to the guidelines in GoldenVIP folder.

Then I use IVT to generate the blob image and flash it into the RDB2 board.

When I debug with Lauterbach and click the reset button, the PC will reach the startup code expectedly.

But when I try to debug with "Step" or "Over" button, it will jump to "HardFault_Handler" directly.

chaoping_0-1757053768242.pngchaoping_1-1757053790464.png

Do you know why, it there anything I'm missing to config?

chaoping_2-1757053888930.png

Thank you, looking forward to your feedback.

[chenyin_h]

Hello, @chaoping 

Thanks for your reply

Yes, the T bit should not be set to 0 for cortex-M cores, but I feel sorry that I did not reproduce your issue described on my end, by every "In target reset" triggering, the XPSR remains 0x010000xx, it may not be related with S32G directly.

BR

Chenyin 

[chenyin_h]

Hello, @chaoping 

Thanks for your post, would you mind calibrating on the following:

1. Which version GoldVIP you used?

2. Which project/samples used in your test?

3. Have you ever tried other simpler samples on RDB2, if yes, any similar faults met?

BR
Chenyin

[chaoping]

Hi, NXP support.

GoldVIP version: GoldVIP-S32G2-1.14.0

I would like to test the FBL demo code into RDB2 board. (What I have changed is that, I build with GHS compiler, and use a personal build framework, so all the components were coming from the GoldVIP).

I could make sure the memory have been mapped correctly and loaded to SRAM correctly(by IVT QSPI flash).

I just don't understand why the exception was triggered after only one step of debugging?

[chaoping]

Hi, NXP support.

Looks like I have found the reason.

chaoping_0-1757259468702.png

When I perform the "In Target Reset" in the Lauterbach. I could see the XPSR value reset to 0.

chaoping_1-1757259542023.png

The "Thumb" bit with 0 will make the processor enter "Lockup".

So I tried modify the XPSR to 0x01000000, then debugging becomes normally.

Could you tell me why would this XPSR to be cleared as "0" after reset by Lauterbach?

Is it mandatory to be set once after Power on the Chip?