Fail Safe state transition not happening from INIT_FS to ABIST2

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Fail Safe state transition not happening from INIT_FS to ABIST2

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Anup97
Contributor II

I am attempting to refresh the watchdog using the API (Pmic_VR55XX_TriggerWatchdog). However, after calling this function, the MCU proceeds to system shutdown.

During debugging, we discovered that the state transition is not occurring from INIT_FS to ABIST2. Additionally, after enabling the watchdog, Pmic_InitDevice fails to initialize properly, returning an error code.



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Anup97
Contributor II

Thank you @alejandro_e for the information. It was helpful.

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alejandro_e
NXP TechSupport
NXP TechSupport

Hello @Anup97 ,

If the information I shared helped you solving your problem, could you mark it as an accepted solution? However, if you are still having problems let me know the details to be able to help you.

 

Best regards

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alejandro_e
NXP TechSupport
NXP TechSupport

Hello @Anup97 ,

As you probably already know, to transition from INIT_FS to WAIT_ABIST2 and then to ABIST2 you need to send a good watchdog refresh, as described in the VR5510 datasheet [page 14, Rev. 6 — 31 July 2023]:

alejandro_e_0-1726185018952.png

 

But there is a time limit to send this first watchdog, as described in the datasheet [page 66]:

alejandro_e_1-1726185256026.png

You can check the values the register can take in page 176 Table 122. Fail Safe OTP map description and S32G default setting [page 166]:

alejandro_e_2-1726186003453.png

I was not able to find the default value of the register, but in the worst case you have 256ms to send the first good watchdog reset.

Please note that after the first watchdog reset you the WD windowing starts and you need to send a watchdog refresh periodically [page 14]:

alejandro_e_3-1726186255894.png

You can check the details in section 22.4 Watchdog [page 66]:

alejandro_e_4-1726186487701.png

 

Another thing I can recommend you is to try to run the example Wdg_VR5510_IP_Example_S32G274A_M7 or Wdg_VR5510_IP_Example_S32G399A_M7 depending on your chip, this is to discard possible HW related problems.

 

Let me know if this information was useful.

Best regards

 

 

 

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