DMA based UART using LINFlexd

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DMA based UART using LINFlexd

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noorhasan
Contributor III

Hello,

 

We are trying to use LINFlexd for UART communication in DMA based implementation.

While the same Linflexd channel can be used successfully when we use it with interrupt based implementation, I can't see data being transferred after the DMA0_Ch0 ISR is triggered for DMA based implementation.

Some of the inconsistencies that we observed is related to LIN register values when Tx is triggered.

When we select UART mode in UARTCR, as per the reference manual LINTCSR[mode] should always be set to 1 (UART mode). But, as shown in the screenshot below, it is still set in LIN mode, while UARTCR is in UART Mode.

 

noorhasan_1-1711568966912.png

 

 

noorhasan_0-1711568945889.png

 

noorhasan_2-1711568986109.png

 

noorhasan_3-1711569027395.png

 

noorhasan_4-1711569032492.png

 

 

Further, the data registers are both showing not-accessible (????)

 

noorhasan_5-1711569083583.png

 

 

Although, before the actual data transfer, the data registers are accessible:

noorhasan_6-1711569124056.png

 

Thank you for helping.

 

@justinlydick @haoyue-yan 

 

 

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haoyue-yan
NXP Employee
NXP Employee

Please close this ticket, the issue is being tracked else where.

 

Thanks

View solution in original post

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ssimpson
Contributor II

Hello, I would also be interested in knowing the answer to this question.
The above link notes that I do not have adequate permissions to view the answer.

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Yhh1993
Contributor I
Hello, how did you solve it afterwards
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haoyue-yan
NXP Employee
NXP Employee

Please close this ticket, the issue is being tracked else where.

 

Thanks

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Yhh1993
Contributor I
I also encountered the same problem. Where is the solution document,thanks!
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noorhasan
Contributor III

Please close this post as it is now being followed through a new post:

 

https://community.nxp.com/t5/GM-MCU3-PMIC3-Product-Support/Question-from-GM-DMA-based-UART-using-LIN...

 

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