BSP booting process interfering M7 app

[Ben6]

Hi,

We are trying to integrate M7 custom application with GoldVIP BSP, the target is to boot both M7 & A53 and let each core run independently. We've managed to make bootloader boot both core and start running (UART console and M7 output can be seen), but at some point M7 stopped responsing. 

Here's the console log, M7 stopped somewhere after "(XEN) Grant table range: ...".

Our M7 app is configured using S32G_RTD_4.4_3.0.2_HF01 and build with S32DS3.4. It's a simple demo code where a scheduler is triggered by STM0, which would transmit CAN message periodically using LLCE_CAN, and blink LED connected to GPIO7. Some changes are made to integrated with bootloader & BSP:

• Shared resource initialization process is removed from M7 app (e.g. Mcu_Init(), Port_init(), Platform_init()). Bootloader would configure the system

• Coordinate Mcu configuration of M7 app & bootloader with A53 (e.g. clock tree)

• linker_ram.ld : MEMORY sram region changed to 0x34510000~0x346fffff 

  
• core_specific.h: coordinate MPU setting with linker 
•  Disable MPU, D-cache and I-cache from project setting

Also we find that if we disable MPU and enable cache, both BSP & M7 app could run without interfering each other, which is a weird thing. And some other issue would rise since there are no non-cacheable ram region.

Here's our question:

1. What might be the possible reason for BSP boot process stopping M7 ?

2. Is the modification on M7 app correct ?

3. Why would difference on cache setting making M7 stopped working, when integrating with A53 ?

4. How to make both M7 & A53 work, with MPU enabled or cache disabled?

[Daniel-Aguirre]

Hi,

GoldVIP firmware does implement different features that requires all the needed cores to be available. Could be that it detects the core is not responding and just turning it off and stopping execution, just an idea.

If you are planning on a multicore application, we can recommend looking into the AN13750 available on the S32G2 product page (link: S32G2 Safe and Secure Vehicle Network Processor | NXP Semiconductors). It explains in a better way the multicore application with the S32G2 platform. At this moment, GoldVIP is not intended as a way of loading new applications to the M7 core, but some general guidelines are provided on the community thread provided below:

Unable to Boot M7 on Gold VIP RDB2(S32g274A) - NXP Community

For your questions, you can see some comments below:

Q1 >> What might be the possible reason for BSP boot process stopping M7 ?

A1 >> As explained above, GoldVIP works as a whole, meaning it could be detecting something is wrong and aborting the core execution. Also, could be that your application is accessing a memory address it should not.

Q2 >> Is the modification on M7 app correct ?

A2 >> We cannot confirm if it is correct. Still, the community thread should point out better guidelines on the needed modifications.

Q3 >> Why would difference on cache setting making M7 stopped working, when integrating with A53 ?

A3 >> This is not clear to us, could be more of how the applications are merging rather than the cache itself.

Q4 >> How to make both M7 & A53 work, with MPU enabled or cache disabled?

A4 >> We recommend looking into AN13750, it shows the integration of the 3 available M7 cores and an A53 core.

Please, let us know.