S32K146 Rx receivedbut Tx is not.How to config RxFIFO filter use 79 Rx CAN Id and 50 Tx CAN ID asMB.

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S32K146 Rx receivedbut Tx is not.How to config RxFIFO filter use 79 Rx CAN Id and 50 Tx CAN ID asMB.

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rteja
Contributor I

Hello NXP, 

Please could someone guide me which value to set in RxFIFO filters under Processor expert. I have read several blogs and also Reference manual. 

My problem according to my DBC file I have 79 Rx CAN ID's messages. I want to set at least 20 Tx CAN ID's where it ranges from Rx-0x680, Tx-0x681, Rx-0x5C8, Tx-0x6D9 and so on... 

In Processor expert I enabled RxFIFO and set 80 RxFIFO filters and configured. where I could receive Rx CAN Id messages from CANOe tool but I am not able to send Tx messages. I debugged and checked the status show STATUS_CAN_BUFF_OUT_OF_RANGE = 0x300U, /*!< The specified MB index is out of the configurable range */

I have reconfigured in PE(process expert) under RxFIFO Filter number to 8 Rx FIFO Filters and reduced my CANID count from 79 to 5 CAN Ids. Then I could send Rx and Tx messages, where my code works with issues.

I knew that my problem lies within the RxFIFO filter range but I need a solution where I can use 79 CAN IDs and apply more than 20 Tx messages. I tried with available filter numbers in PE. 

Is there any other way of example code where I could get the return status success with all CAN ID Rx and Tx will be really appreciated.

Please someone from NXP could let me know how to fix this issue. 

Note: I am not using CAN FD or extended IDs. I have configured only CAN0 component only. 

 

rteja_1-1688568440621.png

 

rteja_0-1688567800030.png

rteja_2-1688569926308.png

 

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5,416 Views
Senlent
NXP TechSupport
NXP TechSupport

Hi@rteja

I made some modifications but I have no conditions to help you test.

1.

uint8_t krInitCAN()
{
//	PINS_DRV_WritePin(PTE, MAIN5V_EN_PIN, 1);
//	PINS_DRV_WritePin(PTB, POW_D3V3_EN_PIN, 1);

	CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT, g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);
	CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT);

	POWER_SYS_Init(powerConfigsArr, POWER_MANAGER_CONFIG_CNT, powerStaticCallbacksConfigsArr, POWER_MANAGER_CALLBACK_CNT);
	POWER_SYS_SetMode(POWER_MANAGER_RUN,POWER_MANAGER_POLICY_FORCIBLE);

	//status_t returnValue = STATUS_ERROR;
	PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);

	PINS_DRV_WritePin(PTE, MAIN5V_EN_PIN, 1);
	PINS_DRV_WritePin(PTB, POW_D3V3_EN_PIN, 1);

	FLEXCAN_DRV_Deinit(INST_CANCOM1);

	//enable STB and EN pins on CAN Transceiver
	krSetCANEnable(CAN_EN_ENABLE);
	krSetCANStandby(CAN_STB_ON);

	FLEXCAN_DRV_Init(INST_CANCOM1, &canCom1_State, &canCom1_InitConfig0);

	//Add filter
	for(uint8_t i = 0; i < CAN_IDs_COUNT_IVI; i++)
	{
		Can1RxFilter[i].isExtendedFrame	= false;
		Can1RxFilter[i].isRemoteFrame	= false;
		Can1RxFilter[i].id				= CanIDFilterList[i];
	}

	/*set RX masking type as RX global mask or RX individual mask.*/
	FLEXCAN_DRV_SetRxMaskType(INST_CANCOM1,FLEXCAN_RX_MASK_INDIVIDUAL);

	FLEXCAN_DRV_ConfigRxFifo(INST_CANCOM1, FLEXCAN_RX_FIFO_ID_FORMAT_A, Can1RxFilter);


	//Enable Interrupt and set priority
//	INT_SYS_EnableIRQ(CAN1_ORed_0_15_MB_IRQn);
//	INT_SYS_SetPriority(CAN1_ORed_0_15_MB_IRQn, 0U);

	INT_SYS_EnableIRQ(CAN0_ORed_0_15_MB_IRQn);
	INT_SYS_SetPriority(CAN0_ORed_0_15_MB_IRQn, 1U);

	INT_SYS_EnableIRQ(CAN0_ORed_16_31_MB_IRQn);
	INT_SYS_SetPriority(CAN0_ORed_16_31_MB_IRQn, 1U);

	//Install Callback
	FLEXCAN_DRV_InstallEventCallback(INST_CANCOM1, Can1Callback, NULL);
    FLEXCAN_DRV_InstallErrorCallback(INST_CANCOM1, CanDrv_ErrorCallback, NULL);

    FLEXCAN_DRV_RxFifo(INST_CANCOM1, &Can1RxMsg);

	return STATUS_SUCCESS;
}

2.#define TX_MAILBOX (26U) //MB26~31

 

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rteja
Contributor I

Thank you @Senlent the problem got solved. I learned more information which I missed to include Rx individual mask and enable interrupt related to my priority. Thanks for your  precious time and quick response. 

 

 

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Senlent
NXP TechSupport
NXP TechSupport

Hi@rteja

for you question,you can take a look at this post and there is a demo in the attachment for user reference

S32K1xx-FlexCAN Mask Setting Demo 

 

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rteja
Contributor I

Hi @Senlent 

thank you for quick reply. I checked the information from the link you have provided. I tried both the methods to update RxFIFO in PE and still not working. I assume I need to add more information regarding my problem.

I want to know for S32K146 MCU if I have CAN ID range from 0x 200~ 0x77F total 79 Rx CAN ID's. 

I have maximum MB 32 as per specification. Now out of 79 CAN ID's I want to send  Tx CAN message ID where range from 0x600 ~ 0x700.

Here I am confused which filter number I must set under RxFIFO in PE(processor expert). So that both 79 Rx CAN IDs and Tx CAN Id's are able to work. 

Please could you  show me how many filter I can setup in PE. so that remaining MB will support my above CAN ID range 0x600 ~ 0x700.  

 

 

 

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Senlent
NXP TechSupport
NXP TechSupport

Hi@rteja

You may be misunderstanding something.

1. Usually we will set a filter elements for a continuous CAN ID, such as 0x200~0x27F.
If your CAN ID has N consecutive areas between 0x200~0x7ff, then I can suggest you to set the filtering setting to N.

The larger the N is set, the less available MB will be

Senlent_0-1689147978460.png
2.One MB can be time-shared to send different CAN IDs

3.Here you have set 80 filter tables, then only MB26~MB31 are left for availabe MB, that is, only 6 MB are left for use.

Senlent_1-1689149011651.png

4.The PE clock is set to 80MHz, and the communication rate is 100bps. I have never encountered any project that uses such a low communication rate.

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rteja
Contributor I

@Senlent 

thank you so much for your quick reply. The project which I am working we are using low baud rate 100kb.

So based on your point [3.Here you have set 80 filter tables, then only MB26~MB31 are left for available MB, that is, only 6 MB are left for use] If I need to send Tx messages what would be the best solution to configure ?  

If I decrease the RxFIFO filter number I am not able to receive the CAN message ID from CAN tool for an eg: canfilterlist[count79] where Rxfifo filter set to 40 remaining CAN ID's from the count are not received

If I decrease MB I am not able to transmit/send Tx messages for above count. To balance this what I am supposed to do. I have read so many blogs didn't find solution would be really appreciated if you could help me with this.

 

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Senlent
NXP TechSupport
NXP TechSupport

Hi@rteja

“If I decrease MB I am not able to transmit/send Tx messages for above count. To balance this what I am supposed to do. I have read so many blogs didn't find solution would be really appreciated if you could help me with this.”

As I answered above, this should be able to send different CAN IDs even if only one MB is available

like below shows.

Senlent_0-1689154333301.png

If this really can't meet your requirements, then I can only suggest you to use two CAN instances.

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5,483 Views
rteja
Contributor I

Hi @Senlent 

I have tried as you mentioned I defined constant mailbox value to as  #define MAILBOX 10U

Still I am not able to send Tx CAN ID. 

Could you share an example for 2 CAN instance ?  

I am working only on CAN0. 

I also referred https://community.nxp.com/t5/S32K/Missing-CAN-messages-during-transmission/m-p/1093927#M7966

and https://community.nxp.com/t5/S32K/CAN-messages-lost-in-S32k146/td-p/1182235

still the same issue I don't have more information how they solved this issue. 

Please support me. 

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5,468 Views
Senlent
NXP TechSupport
NXP TechSupport

Hi@rteja

Senlent_0-1689210558677.png

1. You can see that the S32K146 has 3 CAN Instances. If you feel that one CAN instance cannot meet your needs, then you can use the other two, which means that you need to modify your hardware and add CAN Phy to it. 

2. The link you provided, you can see that it uses 10 MB for sending, which is still different from your problem.

Can you share your project, I can try to help you troubleshoot possible problems。

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5,456 Views
rteja
Contributor I

Hi @Senlent 

thank you for your kind reply. I have attached my CAN project for your reference. 

I also included N CAN IDs which I want to use in my project. 

You can also check the PE and could correct me if any changes required.

Currently the code can send and receive when I set RxFIFO filter to 16 Rx FIFO Filters in PE  and 32 MB. Then I can use only 16 CAN IDs which points the problem. At the end I want to use 79 CAN IDs as Rx and Tx.

Please let me know if you need any further information. 

 

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5,417 Views
Senlent
NXP TechSupport
NXP TechSupport

Hi@rteja

I made some modifications but I have no conditions to help you test.

1.

uint8_t krInitCAN()
{
//	PINS_DRV_WritePin(PTE, MAIN5V_EN_PIN, 1);
//	PINS_DRV_WritePin(PTB, POW_D3V3_EN_PIN, 1);

	CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT, g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);
	CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT);

	POWER_SYS_Init(powerConfigsArr, POWER_MANAGER_CONFIG_CNT, powerStaticCallbacksConfigsArr, POWER_MANAGER_CALLBACK_CNT);
	POWER_SYS_SetMode(POWER_MANAGER_RUN,POWER_MANAGER_POLICY_FORCIBLE);

	//status_t returnValue = STATUS_ERROR;
	PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);

	PINS_DRV_WritePin(PTE, MAIN5V_EN_PIN, 1);
	PINS_DRV_WritePin(PTB, POW_D3V3_EN_PIN, 1);

	FLEXCAN_DRV_Deinit(INST_CANCOM1);

	//enable STB and EN pins on CAN Transceiver
	krSetCANEnable(CAN_EN_ENABLE);
	krSetCANStandby(CAN_STB_ON);

	FLEXCAN_DRV_Init(INST_CANCOM1, &canCom1_State, &canCom1_InitConfig0);

	//Add filter
	for(uint8_t i = 0; i < CAN_IDs_COUNT_IVI; i++)
	{
		Can1RxFilter[i].isExtendedFrame	= false;
		Can1RxFilter[i].isRemoteFrame	= false;
		Can1RxFilter[i].id				= CanIDFilterList[i];
	}

	/*set RX masking type as RX global mask or RX individual mask.*/
	FLEXCAN_DRV_SetRxMaskType(INST_CANCOM1,FLEXCAN_RX_MASK_INDIVIDUAL);

	FLEXCAN_DRV_ConfigRxFifo(INST_CANCOM1, FLEXCAN_RX_FIFO_ID_FORMAT_A, Can1RxFilter);


	//Enable Interrupt and set priority
//	INT_SYS_EnableIRQ(CAN1_ORed_0_15_MB_IRQn);
//	INT_SYS_SetPriority(CAN1_ORed_0_15_MB_IRQn, 0U);

	INT_SYS_EnableIRQ(CAN0_ORed_0_15_MB_IRQn);
	INT_SYS_SetPriority(CAN0_ORed_0_15_MB_IRQn, 1U);

	INT_SYS_EnableIRQ(CAN0_ORed_16_31_MB_IRQn);
	INT_SYS_SetPriority(CAN0_ORed_16_31_MB_IRQn, 1U);

	//Install Callback
	FLEXCAN_DRV_InstallEventCallback(INST_CANCOM1, Can1Callback, NULL);
    FLEXCAN_DRV_InstallErrorCallback(INST_CANCOM1, CanDrv_ErrorCallback, NULL);

    FLEXCAN_DRV_RxFifo(INST_CANCOM1, &Can1RxMsg);

	return STATUS_SUCCESS;
}

2.#define TX_MAILBOX (26U) //MB26~31

 

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rteja
Contributor I
Thank you @Senlent the problem got solved. I learned more information which I missed to include Rx individual mask and enable interrupt related to my priority. Thanks for your  precious time and quick response. 

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