Hi Team ,
I'm using S32K144 Microcontroller with S32 Design Stuido , with 3.0 SDK
With the help of processor expert , I have managed to configure CAN0 for Tx , Rx & RXFIFO
But RXFIFO(through DMA) is triggering event , after recieving only one CAN frame
I have replicated the Sample code of RXFIFO(downloaded from nxp website ) , it is receiving only one CAN frame , then i have to call FLEXCAN_DRV_RxFifo to recieve again
I'm aware that RXFIFO is used to store multiple CAN frames , but in these case only one CAN frame is getting stored
Please let me know how to solve these issue
解決済! 解決策の投稿を見る。
Hi,
no, see words from the RM....
IFLAG1[BUF5I] (Frames available in Rx FIFO) is asserted when there is at least one frame available to be read from the FIFO. Consequently a DMA request is generated simultaneously. Upon receiving the request, the DMA controller can read the message (accessing the output of the FIFO as a message buffer). The DMA reading process must end by reading address 0x8C, which clears IFLAG1[BUF5I] and updates both the FIFO output with the next message (if FIFO is not empty) and the RXFIR register with the attributes of the new message. If there are more messages stored in the FIFO, IFLAG1[BUF5I] will be re-asserted and another DMA request is issued. Otherwise, the flag remains negated.
So using the SDK, if you do not call FLEXCAN_DRV_RxFifo, FlexCAN RXFIFO can hold 6 messages, without reading, further messages will be lost. By calling FLEXCAN_DRV_RxFifo you allow to read single message from RXFIFO, thus you need to do it repeatedly.
BR, Petr
Thanks for the reply Petr
But DMA should trigeer ISR after all the 6 messages gets received right ?
If DMA is trigeering ISR eveytime a message is recieved , what is a way to recieve 6 message without trigerring ISR
Hi,
no, see words from the RM....
IFLAG1[BUF5I] (Frames available in Rx FIFO) is asserted when there is at least one frame available to be read from the FIFO. Consequently a DMA request is generated simultaneously. Upon receiving the request, the DMA controller can read the message (accessing the output of the FIFO as a message buffer). The DMA reading process must end by reading address 0x8C, which clears IFLAG1[BUF5I] and updates both the FIFO output with the next message (if FIFO is not empty) and the RXFIR register with the attributes of the new message. If there are more messages stored in the FIFO, IFLAG1[BUF5I] will be re-asserted and another DMA request is issued. Otherwise, the flag remains negated.
So using the SDK, if you do not call FLEXCAN_DRV_RxFifo, FlexCAN RXFIFO can hold 6 messages, without reading, further messages will be lost. By calling FLEXCAN_DRV_RxFifo you allow to read single message from RXFIFO, thus you need to do it repeatedly.
BR, Petr
Hi,
RXFIFO, once enabled, is still able to store up to 6 messages. FLEXCAN_DRV_RxFifo just re-enable RXFIFO interrupt or in case of DMA prepare DMA channel to read one message from RXFIFO. So if there are unread messages in RXFIFO, which could happen, the oldest one is read, interrupts are disabled, DMA stopped, and you need to call FLEXCAN_DRV_RxFifo again to allow reading RXFIFO again.
The driver is simply written this way.
BR, Petr
Hi Petrs
I have one follow up question for the same , if you insist I can create a new ticket for the same
With the help of SDKs , I was able to configure RXFIFO & a callback event function for the same(Callback event is working pretty fine for event FLEXCAN_EVENT_DMA_COMPLETE)
Whenever there is warning or overflow in RXFIFO , I could see the same in IFLAG1(BUF6I) & IFLAG1(BUF7I) registers but it is not triggering the Callback event for FLEXCAN_EVENT_RXFIFO_WARNING & FLEXCAN_EVENT_RXFIFO_OVERFLOW
Please let me know , where I'm going wrong
Regards
Karthik SV
Hi,
The CAN_IFLAG1[BUF6I] and CAN_IFLAG1[BUF7I] are not used when the DMA feature is enabled.
So I guess events for this will not work for DMA mode, just for interrupt one.
BR, Petr
Hi Petrs
I tried implementing RXFIFO using interuppt one as well , I was able to trigger FLEXCAN_EVENT_RXFIFO_COMPLETE Event
But those two was not getting triggered , even though CAN_IFLAG1[BUF6I] and CAN_IFLAG1[BUF7I] are set
Please find the attached project files , Let me know if you can find any issues
Regards
Karthik SV
Hi,
looking over driver code (RTM 3.0.3) within FLEXCAN_IRQHandlerRxFIFO it seems other events will not be called if also BUF5I flag is set, which is always set when there is message to be read from RXFIFO. I guess the only condition FLEXCAN_EVENT_RXFIFO_WARNING event can be hit is
- do not call FLEXCAN_DRV_RxFifo
- receive 5 messages into RXFIFO to set BUF6I, do not receive further messages
- call FLEXCAN_DRV_RxFifo five times to read out RXFIFO completely. BUFI6 should be set still
- call FLEXCAN_DRV_RxFifo again, event should be hit
But this makes no sense for application.
BR, Petr
Hi Petrs
Correct me if I'm wrong
So this is a bug in FLEXCAN_IRQHandlerRxFIFO ??
Ofcourse we want to see if CAN RXFIFO has Warning or overflow , only after calling FLEXCAN_DRV_RxFifo function
If it is not able to trigger the event during this time , so those events has no importance in FLEXCAN_IRQHandlerRxFIFO right ???
Regards
Karthik SV