RTM SDK QSPI watermark functions/QSPI example.

[Anonymous]

S32 Design Studio for ARM 2018.R1 with Update 11.

Example project qspi_external_flash_s32k148 from "S32K1xx RTM SDK v3.0.0" (can't find a 3.0.2 example but "S32 Design Studio S32K1xx SDK RTM 3.0.2 Patch for SDK RTM 3.0.0" is installed). In file quadspi_hw_access.h.

static inline void QSPI_DRV_SetRxWatermark(QuadSPI_Type *baseAddr,
                                           uint8_t watermark)
{
    uint32_t regValue = (uint32_t)baseAddr->RBCT;
    regValue &= (uint32_t)(~(QuadSPI_RBCT_WMRK_MASK));
    regValue |= QuadSPI_RBCT_WMRK(watermark - 1U);
    baseAddr->RBCT = (uint32_t)regValue;
}
static inline void QSPI_DRV_SetTxWatermark(QuadSPI_Type *baseAddr,
                                           uint8_t watermark)
{
    uint32_t regValue = (uint32_t)baseAddr->TBCT;
    regValue &= (uint32_t)(~(QuadSPI_TBCT_WMRK_MASK));
    regValue |= QuadSPI_TBCT_WMRK(watermark);
    baseAddr->TBCT = (uint32_t)regValue;
}

Shouldn't both be "watermark - 1U"?

QSPI_DRV_Init() calls    

QSPI_DRV_SetTxWatermark(baseAddr, 2U);
QSPI_DRV_SetRxWatermark(baseAddr, 1U);

Is the TX watermark supposed to be 8 or 12 bytes?

[danielmartynek]

Hello mjoh,

The S32K1xx Reference Manual, rev.11 does not restrict the setting of the Buffer Watermarks.

The values in the driver were selected based on testing. 

Do you have any issue with the driver?

Thanks,

BR, Daniel

[Anonymous]

No issue, but still curious why one is/was

QuadSPI_RBCT_WMRK(watermark - 1U)
and the other

QuadSPI_TBCT_WMRK(watermark)