where to use Hardware semaphores

[zy]

     I am using XGATE in my project. Main Timer Interrupt Flag 1 (TFLG1) and Port T Data Register (PTT)in both s12x_cup and XGATE. They don't process the same timer and the same port, I think when I process PTT in both core ,I must use Hardware semaphores to prevent Unpredictable wrong . I don't know  if I must use   Hardware semaphores during process TFLG1 register? 

example:

//in s12x_cup)   

       while(TEST_SEM(0)){
              SET_SEM(0)        

}
         PTT_PTT0=0;

         
        REL_SEM(0);
    }

// in XGATE

while(!_ssem(0));
       PTT_PT1=1;
      _csem(0);

If it is necessary like that :

//in s12x_cup)   

       while(TEST_SEM(1)){
              SET_SEM(1)        

}
         TFLG1=0X01;

         TIE&=(~0x01);

         
        REL_SEM(1);
    }

// in XGATE

while(!_ssem(0));
       TFLG1=0X02;
       TIE&=(~0X02);     

 _csem(0);

 thank you.

    Sorry for my bad english.

[kef]

Yes, with some exceptions you need to use hardware semaphores to write-access shared registers or variables from both cores. 

You need to use semaphores to set/clear PTT bits from both cores.

PTT |= 1; - to set/clear bit(s), CPU or XGATE has to read PTT, manipulate bits in read bit pattern, then write resulting pattern back to PTT. Problem happens when one code reads PTT while another code read PTT, but didn't yet write it back to PTT. Various artifacts are possible...

You don't need semaphore in case one core is just reading PTT, and never writes it.

In case of timer flags, you don't need to use semaphore.

TFLG1 = (1<<3); // clear TFLG1.bit3  done from one core won't disturb

TFLG1 = (1<<4); // clear bit4 done from another core. Result of operation doesn't really depend on previous state of TFLG1. If bit3 was set, it will be cleared, but won't toggle or something. It's safe to clear timer flags without semaphore.

• //in s12x_cup)  
•       while(TEST_SEM(1)){               SET_SEM(1)       
• }          TFLG1=0X01;
•          TIE&=(~0x01);
•                  REL_SEM(1);     }
• // in XGATE
• while(!_ssem(0));        TFLG1=0X02;        TIE&=(~0X02);    
• _csem(0);

Like I said, you don't need semaphore for TFLG1=0x01, but you need semaphore for TIE &= ~1 ! For example one core clears TIE bit 0, another core at the same time clears TIE bit 1. Consider following scenatio

core1                      core2

read r1=TIE==3    

                               read r2=TIE==3

r1=r1 & ~1 = 2

                               r2 = r2 & ~2 = 1

TIE = r1 = 2

                               TIE = r2 = 1

-----------------

Instead of resulting TIE = 0 you get TIE=1.

[zy]

thank you very much