how to config overcurrent protection when use external drive?

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

how to config overcurrent protection when use external drive?

Jump to solution
2,539 Views
Monke
Contributor I

Hello,I now use s12zvmc and mc33937 to drive a 24V BLDC motor,I have some question about overcurrent protection

1,mc33937 can't close pwm output self when overcurrent happened

2,mc33937 has an interrupt signal connected to s12z, but when the motor in overcurrent condition, the software interrupt was not quickly enough to protect the MOSFET.

3,I notice that s12zvmc12 has a Fault5 signal that can be configured as an interrupt signal and can turn off PWM output, but my Fault5 signal is used on pwm0.

4,Now my current amplifier is output from mc33937 to s12z, and the input pin is an0_ 0. Now I want to know how to configure s12zvmc to realize overcurrent protection

 

0 Kudos
1 Solution
2,521 Views
StanoA
NXP TechSupport
NXP TechSupport

Hello Monke,

The AN0_0 is the ADC input for the analog value measurement. It has not interrupt associated with PWM disable function.

The overcurrent protection is implemented on the two OpAmps associated with GDU. They are intended for the power MOSFETs currents measurement and it can also detect the overcurrent events. But the result of the OC event detected is to disable the internal GDU drivers instead of the PWM channels used for the external driver.

You mention that the interrupt generated by MC33937 tied to MCU has low speed reaction not sufficient for MOSFETs protection.

The high speed reaction to OC event can be maintained only by the external HW circuitry. The interrupt generated by MC33937 can block the PWM signals into external driver and set the required input levels for each input pin of the driver. For example the simple multiplexer can be used for this task. The interrupt signal from MC33937 will switch the multiplexer inputs from MCU_PWM to used defined states. This interrupt must be tied to MCU also to provide info about OC event. Then the SW can manage MC33937 through SPI bus.

I hope it could help you to solve this task.

Best Regards,

Stano.

View solution in original post

0 Kudos
7 Replies
2,522 Views
StanoA
NXP TechSupport
NXP TechSupport

Hello Monke,

The AN0_0 is the ADC input for the analog value measurement. It has not interrupt associated with PWM disable function.

The overcurrent protection is implemented on the two OpAmps associated with GDU. They are intended for the power MOSFETs currents measurement and it can also detect the overcurrent events. But the result of the OC event detected is to disable the internal GDU drivers instead of the PWM channels used for the external driver.

You mention that the interrupt generated by MC33937 tied to MCU has low speed reaction not sufficient for MOSFETs protection.

The high speed reaction to OC event can be maintained only by the external HW circuitry. The interrupt generated by MC33937 can block the PWM signals into external driver and set the required input levels for each input pin of the driver. For example the simple multiplexer can be used for this task. The interrupt signal from MC33937 will switch the multiplexer inputs from MCU_PWM to used defined states. This interrupt must be tied to MCU also to provide info about OC event. Then the SW can manage MC33937 through SPI bus.

I hope it could help you to solve this task.

Best Regards,

Stano.

0 Kudos
2,495 Views
Monke
Contributor I

Thank you for your reply,Can you give me some suggestion about “external HW circuitry”?

0 Kudos
2,491 Views
StanoA
NXP TechSupport
NXP TechSupport

Hello Monke,

One example how it could be solved is in follow:

StanoA_0-1635157352749.png

 

The OVER_CURRENT signal is from the external driver – over current interrupt. It selects the all mux inputs as “0” when OC event detected by MC33937.

I hope it could help you to solve your task.

Best Regards,

Stano.

0 Kudos
2,484 Views
Monke
Contributor I

Thank you for your reply.

I want to use a  inverter gate chip  to disable Mc33937's EN1 and EN2 pin when interrupt pin in high status,Do you think it is feasible?

0 Kudos
2,445 Views
StanoA
NXP TechSupport
NXP TechSupport

Hello Monke,

Please take care – the EN1 & EN2 must be latched – because when you disable the outputs the OC event disappears and EN1 & EN2 will rise up back – it causes oscillations. The latch has to controlled by MCU software.

I hope it could help you to solve your task.

Best Regards,

Stano.

0 Kudos
2,443 Views
Monke
Contributor I

I want to use INT pin but not OC pin of mc33937,I find that once interrupt generated,if i dont clean it,it want't clean self?

0 Kudos
2,360 Views
StanoA
NXP TechSupport
NXP TechSupport

Hello Monke,

sorry for answer delay, it was caused by our holiday days.

The INT pin function description is in section 7.2.15 and EN1 & EN2 in section 7.2.3 of datasheet. So you can use it for the OC protection, but the INT signal must be inverted for this usage. The OC event will be latched on INT pin, so it has to cleared by software through SPI bus.

I hope it could help you to solve your task.

Best Regards,

Stano.

0 Kudos