TIM16B8CV2 override mode

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TIM16B8CV2 override mode

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huguesangelis
Contributor II

Hi all.

 

Here are questions about TIM in 9s12 and especialy about the OC7M and OC7D registers.

 

First question :

Looking at datasheet (S12XS Family reference manual Rev 1.13) page 474, the table 16-10 shows : TC7>TCX or TC7=TCX.

But output compare mode explanations (page 485) talk about channel 7 event (either overflow of free running counter if TTOV7 is set or succesfull output compare) that trigger override mode.

 

Therefore i don't understand witch one is true. I believe that there is a mistake page 474 and that the right text should be TC7 not equal to TCNT or TC7=TCNT.

 

Second question :

Also what does mean OC7Dx + OMx/OLx (page 474) I believe it means that first IOCx = OC7Dx and then the value is affected by OMx/OLx if TCx = TCNT.

Am I right ?

 

Thank to all.

Greetings

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kef2
Senior Contributor IV


Hi

1) There are two ways to toggle timer pins using output. OMx/OLx bits and OC7Dx+OC7Mx bits. Both can be engaged at the same time. OMx/OLx can toggle only TCx channel, while TC7 channel (OC7Dx/OC7Mx) can toggle each channel. This allows for example to set channel 5 on TC5=TCNT using OM5/OL5 bits, and clear it in TC7=TCNT using OC7D5/OC7M5 bits. Table you mentioned defines what happens for example when TC5=TC7 and both compare modes OM5/OL5 and OC7D5/OC7M5 are engaged. Also it defines what happens if you set OM7/OL7 and OC7D7/OC7M7.

I'm not sure what happens in case TC7<TCx, it is not listed in the table, but it is clear that 1) when TC7=TCx and OC7Mx is set, OC7Dx/OC7Mx bits always take precedence over OMx/OLx bits. This is also true for OM7/OL7 and OC7D7/OC7M7 used at the same time, since TCx is TC7, and TC7 always equals TC7.

2) OC7Dx + OMx/OLx

+ here means OR. It means that either or both metods can toggle pin. So in case TC7 > TCx, first TCx toggles pin as programmed by OMx/OLx bits, then TC7 toggles the same pin as programmed by OC7Dx pin. This mode can be used to generate PWM waveform without CPU interrupts. To do PWM you need to set TCRE bit (reset TCNT to zero after TCNT=TC7), write PWM period setting to TC7 register, PWM pulse width to TCx register, enable TC7 and TCx output compares, program corresponding OMx/OLx and OC7Mx/OC7Dx bits.

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kef2
Senior Contributor IV


Hi

1) There are two ways to toggle timer pins using output. OMx/OLx bits and OC7Dx+OC7Mx bits. Both can be engaged at the same time. OMx/OLx can toggle only TCx channel, while TC7 channel (OC7Dx/OC7Mx) can toggle each channel. This allows for example to set channel 5 on TC5=TCNT using OM5/OL5 bits, and clear it in TC7=TCNT using OC7D5/OC7M5 bits. Table you mentioned defines what happens for example when TC5=TC7 and both compare modes OM5/OL5 and OC7D5/OC7M5 are engaged. Also it defines what happens if you set OM7/OL7 and OC7D7/OC7M7.

I'm not sure what happens in case TC7<TCx, it is not listed in the table, but it is clear that 1) when TC7=TCx and OC7Mx is set, OC7Dx/OC7Mx bits always take precedence over OMx/OLx bits. This is also true for OM7/OL7 and OC7D7/OC7M7 used at the same time, since TCx is TC7, and TC7 always equals TC7.

2) OC7Dx + OMx/OLx

+ here means OR. It means that either or both metods can toggle pin. So in case TC7 > TCx, first TCx toggles pin as programmed by OMx/OLx bits, then TC7 toggles the same pin as programmed by OC7Dx pin. This mode can be used to generate PWM waveform without CPU interrupts. To do PWM you need to set TCRE bit (reset TCNT to zero after TCNT=TC7), write PWM period setting to TC7 register, PWM pulse width to TCx register, enable TC7 and TCx output compares, program corresponding OMx/OLx and OC7Mx/OC7Dx bits.

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