S912ZVML128 GDUCTR/GDUDSLVL Configuration

[dannydeng]

Dears,

     Have anybody confirmed GBKTIM2 & GBKTIM1 can be configured in S912ZVML128 , and GDUDSLVL can be cofigured in S912ZVML128?

     Thanks,

[dannydeng]

Hi Iggi,

   Thanks for your kindly response.

   As I found the filter time not the value I set before sometimes. I will check it again.

Thanks and Best Regards,

Ray Deng

[iggi]

Hi Ray,

Why do you have doubts about configuring these GDU registers bits?

The S912ZVML128 has GDU module version V4 the two bits, GDSFHS and GDSFLS, are not available on GDUV4.

But GBKTIM1/2 are available on all GDU versions (4,5 and 6). So they are writable.

Haven't you overlooked the note about GBKTIM1/2?

NOTE :
The register bits GBKTIM1 and GBKTIM2 must be set to the required values before the PWM channel isactivated. Once the PWM channel is activated, the value of GBKTIM1 & GBKTIM2 must not change. If a different blanking time is required, the PWM channel has to be turned off before new values to GBKTIM1 & GBKTIM2 are written.

Regards,

iggi