S12ZVML31 interrupt priority

[frankkong]

 Hello

        I am using threee interrupt now. Time0 channel0(vector address 0x1CC),Time0 channel3(vector address 0x1C0), ADC1 conversion complete (vector address 0x114).

         The priority configuration is INT_CFDATA3_PRIOLVL = 7;  INT_CFDATA0_PRIOLVL=2; 

           INT_CFDATA5_PRIOLVL = 1.

          I find that   Time0 channel3 and ADC1 conversion complete 's  priority  is higher than  Time0 channel0 .Why?

          Is there an error in the configuration? 

Thank you 

[lama]

I have quickly gone through the data sheet and wrote something like this....not tested and hope did not make a mistake.

#define SET_INTERRUPT_PRIORITY(vec_off, priority)       \

  INT_CFADDR= (vec_off >> 2) & 0xF8;                               \

  INT_CFDATA_ARR[(vec_off >> 2) & 0x07]= (priority)

//******************************************************************************

#define TC0_VECOFF         0x1CC          // vector offset

#define TC1_VECOFF         0x1C0          // vector offset

#define ADC1_VECOFF        0x114          // vector offset

//******************************************************************************

Then in the code, anytime you can change interrupt priority or even disable interrupt request (setting priority level 0) , for example:

SET_INTERRUPT_PRIORITY(TC0_VECOFF, 7); // set level 7 priority for TC0

SET_INTERRUPT_PRIORITY(TC1_VECOFF, 2); // set level 2 priority for TC1

SET_INTERRUPT_PRIORITY(ADC1_VECOFF, 1); // set level 1 priority for ADC1

Description:

The data sheet states that when you want to select block of 8 interrupt numbers then:

CFADDR * 4 must provide start vector of the block. Starts of the blocks are vectors at offsets 0x00,0x20,0x40,....=>

CFADDR = 0x00>>2, 0x20>>2, 0x40>>2,....

The data sheet provides as an example that if I want to select block starting with 0x1C0 I must write into CFADDR number 0x70.

INT_CFADDR= (vec_off >> 2) & 0xF8 = (0x1C0 >> 2) & 0xF8 = 0x70 ;

Lets test block {0x1C0,0x1C4,0x1C8,0x1CC,0x1D0,0x1D4,0x1D8,0x1DC}...all of them should be selected by CFADDR 0x70 =>

(0x1C0>>2) & 0xF8 = 0x70 & 0xF8 = 0x70

(0x1C4>>2) & 0xF8 = 0x71 & 0xF8 = 0x70

(0x1C8>>2) & 0xF8 = 0x72 & 0xF8 = 0x70

(0x1CC>>2) & 0xF8 = 0x73 & 0xF8 = 0x70

(0x1D0>>2) & 0xF8 = 0x74 & 0xF8 = 0x70

(0x1D4>>2) & 0xF8 = 0x75 & 0xF8 = 0x70

(0x1D8>2) & 0xF8 = 0x76 & 0xF8 = 0x70

(0x1DC>>2) & 0xF8 = 0x77 & 0xF8 = 0x70

Now we have to select correct offset of the interrupt vector withing selected block:

Lets test block {0x1C0,0x1C4,0x1C8,0x1CC,0x1D0,0x1D4,0x1D8,0x1DC}...they should provide offset {0,1,2,3,4,5,6,7}

INT_CFDATA_ARR[(vec_off >> 2) & 0x07]= (priority)

(0x1C0 >> 2) & 0x07= 0x70 & 0x07 = 0

(0x1C4 >> 2) & 0x07= 0x71 & 0x07 = 1

(0x1C8 >> 2) & 0x07= 0x72 & 0x07 = 2

(0x1CC >> 2) & 0x07= 0x73 & 0x07 = 3

(0x1D0 >> 2) & 0x07= 0x74 & 0x07 = 4

(0x1D4 >> 2) & 0x07= 0x75 & 0x07 = 5

(0x1D8 >> 2) & 0x07= 0x76 & 0x07 = 6

(0x1DC >> 2) & 0x07= 0x77 & 0x07 = 7

Could you please test in your code?

Best regards,

Ladislav