S12ZVL internal Oscillator PLL

[rajivbandodkar]

Hi,

Are there any the limitations of using internal 1MHz oscillator to get highest Bus frequency (32MHz for S12ZVL)? On my board I am not able to go above 16 MHz bus Freq.  With NXP's TRK-S12ZVL, I cannot go beyond 25MHZ. To me looks like some issue in the layout, but even with TRK-S12ZVL board (will surely be multi layer board) why not possible to achieve 32MHz Bus. Any special precautions?

Regards,

Rajiv.

[RadekS]

Hi Rajiv,

The maxim bus clock frequency for S12ZVL is 32MHz.

In that case, the CPMUSYNR value should be 0x5F, CPMUREFDV value should be 0x00, CPMUPOSDIV value should be 0x00.

Note: We know about some issues with some versions of PEmicro/OSBDM interfaces when bus clock is close to their maximum value. In that case, please go to Debug Configuration-Target settings-Edit and uncheck “Use Bus Clock as Debug Controller (SIBDC) Clock Source”. The BDM will run of 1MHz in this case.

The loading code and debugging may be slower, but more stable.

You may also try to download and instal the newest PEmicro/OSBDM drivers.

PLL example codes:

S12ZVM clock module and PLL configuration - SW examples

I hope it helps you.

Have a great day,
Radek

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