kef wrote:
Yes. But also keep in mind that flash and EEPROM are not readable while CCIF bit is 0. Not readable memory means also that CPU can't execute code from memory you are programming. Also CPU can't fetch interrupt vectors from flash array being progammed / erased. Your flash programming routines should run from RAM, EEPROM, another flash array (on D256 you have 4 flash arrays), or external memory.
I will running code from RAM. I'm implementing something similar to the app notes for LRAE & LFAE.
You should find flash program and erase algorithms in the docs.
If you are referring to the FTS256K block guide, then yes, it seems that I do have to write one word at a time, allowing the CBEIF to trigger before continuing.
Also, according to Fig4-2 of that document, after I launch the command, I should wait for CBEIF to be set before writing the next word. Should not also be waiting for CCIF for the command to complete, before writing the next word?