Hi,
Yes, if you read one byte you get one byte either it is aligned or not. More, I think suitable to answer our question, is presented bellow.
In order to understand addressing possibilities I suggest you to study “CPU S12Z Reference Manual - Reference Manual”. Can be downloaded from the page
https://www.nxp.com/products/processors-and-microcontrollers/additional-mpu-mcus-architectures/s12-m...
How many byte are addresses and read is given by addressing modes and access plus Move instructions. “There are separate move instructions for 8-bit, 16-bit, 24-bit, and 32-bit operands. Each move instruction uses immediate address mode or OPR address modes for the source operand and OPR addressing modes for the destination operand.”
Or
“3.12 Memory Operand Sizes
In the linear S12Z CPU, memory operands may be 8-bit bytes, 16-bit words, 24-bit pointers (normally associated with a 24-bit index register), or 32-bit long-words. There are bit-sized operations and bit-field operations on fields of 1-32 bits, but memory contents are always accessed 1, 2, 3, or 4 bytes at a time. Some instructions use operands that are partially or completely encoded into instructions and instruction postbytes and these operands may be other sizes (for example a 5-bit field width or shift count).
The CPU accesses memory information by the 24-bit address of the most significant byte of an operand without regard to alignment and a memory controller takes care of reading or writing the appropriate information. If necessary the memory controller may access misaligned operands in multiple bus cycles.
Like earlier HC11 and HC12 CPUs, the S12Z CPU makes no distinction between program memory and data memory. There is a single linearly addressed 16-megabyte address space and there are no separate instructions to access operands differently in program space than in RAM memory spaces. However, the linear S12Z CPU accesses program information and data information through separate memory busses and controllers. If the program is in a different memory than the data, it is possible for the CPU to access data operands at the same time as program code.”
Best regards,
Ladislav
