Multiple interrupts

[kathi]

Hi Team,

I am using S12Z family MCU, in that when a two bit RAM/EEPROM error occurs the MCU enters Machine exception ISR. I am attaching the file used to generate two bit RAM error

I want to show that a two bit error has occurred on GUI(which is not happening once it entered machine exception ISR) , I am using SCI0 ISR as communication interrupt.

How does MCU treats when multiple interrupts requests occurs at same time and I would also like to know if SCI interrupt can be given higher priority than machine exception.

[lama]

Hi,

could you please check following thread which contains example code....

https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Single-double-bit-RAM-ECC-error-example-cod...

Next thing, I would like to ask what was not clear in the answer for multiply interrupts https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Multiple-Interrupt/td-p/1609854  .

Best regards,

Ladislav.