Hi,
I would like to ask you to open a new thread in the case of a new question which is not absolutely continuing previous topic ... like this one.
The answer is:
It is not only conversion time if you use also interrupt. Jump to subroutine means…the last instruction must be finished and then jump is probably 1us. Plus command start, data processing.
Because of this I used a lot of times continuous conversion if the number of channel was suitable to create acceptable loop time and just read data. Also, processing can be done on XGATE which can move data to variable used by CPU. Just necessary to know XGATE and semaphores.
However, your question was different…
From Table A-15. ATD Operating Characteristics we can get conversion time:
(Noteunder table….The minimum time assumes a sample time of 4 ATD clock cycles. The maximum time assumes a sample time of 24 ATD clock cycles and the discharge feature (SMP_DIS) enabled, which adds 2 ATD clock cycles.)
Conversion fATD Cycles min, 8bit resolution = 17 - 4 – 0 =13
Conversion fATD Cycles min, 10bit resolution = 19 - 4 – 0 =15
Conversion fATD Cycles min, 12bit resolution = 20 - 4 – 0 =16
Proof with max number of cycles:
Conversion fATD Cycles min, 8bit resolution = 39 - 24 – 2 =13
Conversion fATD Cycles min, 10bit resolution = 41 - 24 – 2 =15
Conversion fATD Cycles min, 12bit resolution = 42 - 24 – 2 =16
Sample fATD cycles … SMP[2..0]…= {4;6;8;10;12;16;20;24}
Conversion fATD clocks = Sample fATD cycles + Conversion Cycles for X-bit resolution + discharge clocks=
= {4;6;8;10;12;16;20;24} + {13;15;16} + {0;2}
fATDCLK = fBUS / (2xPRS + 1)
and finally
Conversion period = Conversion fATD clocks / fATDCLK
Best regards,
Ladislav