How to map the logical address to global address for S12XE MCU for the S-record file flashing in CAN bootloader?

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How to map the logical address to global address for S12XE MCU for the S-record file flashing in CAN bootloader?

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007
Contributor II

Hello,

 

I have a question, I have a CAN bootloader, needs to port from S12G MCU to S12XE. But I found its memory structure has some difference. The logical address to global address mapping is some different for S12XE. I know the S12G mapping is as below

For 24 bit logical address(>0xffff, global address is (page * 0x4000) , adding (logical[15:0] - window offset)

  Global addr = bit[23:16] * 0x4000 + (bit[15:0] - 0x8000)

For 16 bit logical address<=0xffff, global address is 0x0c * 0x4000, adding logical address.

Global addr = bit[15:0] + 0x30000

 

Could you give me the formula of S12XE MCU?

 

Regards,

dp

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iggi
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NXP Employee

Hi,

The global address on S12XE starts at 0x7F_FFFF and it can go down to 0x70_0000 (on S12XEP100 device with 1MB flash size) thus providing linear address space. So, there are global pages from 0x70 to 0x7F.

Alternative addressing is by using PPAGEs and mapping window 0x8000-0xBFFF. On S12XEP100 there are 64 of 16K pages addressable via PPAGE register, 0xC0 to 0xFF.

Please, refer to S12XEP100 reference manual for ilustration. There is Figure 1-2. MC9S12XE100 Global Memory Map, and Table 1-4. Derivative Dependent Memory Parameters

http://cache.freescale.com/files/microcontrollers/doc/data_sheet/MC9S12XEP100RMV1.pdf

For example, the global address 0x70_0000 corresponds to address 0xC0_8000.

The 64K global address space 0x70_0000 to 0x70_FFFF corresponds to the 64K address space consisted of 4x 16k pages: 0xC0_8000 to 0xC0-BFFF, 0xC1_8000 to 0xC1-BFFF, 0xC2_8000 to 0xC2-BFFF and 0xC3_8000 to 0xC3-BFFF

Note that the global space 0x7F_4000 to 0x7FFF is the same as local address 0x4000 to 0x7FFF, and 0x7F_C000 to 0xFFFF is the same as 0xC000 to 0xFFFF.

For detailed information about global and local addresses on S12(X) devices, please see following application and technical notes:

- AN3784 Understanding the Memory Scheme in the S12(X) Architecture

http://cache.freescale.com/files/soft_dev_tools/doc/app_note/AN3784.pdf

- TN238 HCS12X – Data Definition

http://cache.freescale.com/files/soft_dev_tools/doc/app_note/TN238.pdf

- TN240 HCS12X – Accessing Data (advanced)

http://cache.freescale.com/files/soft_dev_tools/doc/app_note/TN240.pdf

Regards,

iggi

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Contributor II

Thank you! I will try it.

Regards,

dp

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