How to generate PLL lock reset for S12/MagniV

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How to generate PLL lock reset for S12/MagniV

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vyshakh_j
Contributor I

Hi All,

I am using MC9S12ZVLA128 micro for my application. I am using external 10MhZ clock crystal.

And I have used the OMRE(Oscillator monitor Reset Enable) feature of the MCU.

As a part of my application feature, I have to write one pattern to EEPROM after getting restart from PLL lock reset based on the status of the reset flag register.

Here I want to test my code by reproducing the scenario that causes the PLL lock reset. I am not sure how to reproduce the PLL lock reset.

Can you help me on this with any test code or other steps to test my application software.

Regards,

Vyshakh J

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

Unfortunately, there is no way for the user to trigger the PLL clock monitor reset (PMRF).
It is a safety feature and only for the case that the PLL is really damaged.

BR, Daniel

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