Hi Young-kyun,
Watchdog is enabled by a write to the CPMUCOP register i.e. by writing a nonzero value to COP Watchdog Timer Rate Select bits - CR[2:0]. This action enables the COP counter and start the time-out period.
Below is a very simple code performing watchdog reset tested on S12ZVM EVB. The COP source clock is ACLK. The COP time-out period is set to maximum, so the time between two resets is around 13sec. This will be indicated by LED blink.
//******************************************************************************
// Main program
//******************************************************************************
void main(void) {
unsigned int i;
CPMUCLKS_COPOSCSEL1 = 1; // COP clock source is ACLK
DDRS = 0xff; // Port S set as output
PTS = 0x00; // LEDs off
for(i=0; i<60000; i++) // delay
{
asm nop;
asm nop;
asm nop;
}
PTS = 0xff; // LEDs on
CPMUCOP = 0x47; // Enable watchodg
for(;;) {} /* wait forever */
}
Regarding the jump to reset vector, actually the address is 0xFFFC. You can also use "asm jmp _Startup;"
Regards,
iggi