HCS12 & electrostatic discharge

[Eric_t]

Hi everybody,

We have developed a design with mc9s12dg256 controller, but we have severe problems with electrostatic discharge.

We apply 8KV air discharge on vertical metal surface (PCB board is 10cm away from the metal surface). After several air discharges controller resets.

This is not happen in regular times; sometimes controller resets after 2 or 3 air discharges and sometimes controller resets after 10 or 12 air discharges.

The design is very simple; it is a double layer PCB with mc9s12dg256 controller, a voltage regulator, a reset circuit and pull down registers on each IO port. 

I have attached schematic and PCB.

Could anyone tell us if there is any error in our design?

We will appreciate any help

Nikos

[Eric_t]

Since no one refers any problem in my schematic, I tend to believe that freescale is problematic on ESD.

I have made a 4 layer pcb and I have used a whole layer for GND.

Now electrostatic discharge has no effect on HCS12 controller.

So I would like to ask to the visitors of the forum.

Does anyone use HCS12 controllers with double layer pcb? Or everybody use 4 and above layer pcb?

[Lundin]

Just for the record: regarding the S12DG ESD immunity, I have excellent experience of it. Ironically, at the point this was written I was performing identical ESD tests on a similar system. EN 61000-4-2, level 3, with 6kV applied 10 times at delicate spots such as screws and connectors, also some air discharges at 8kV etc.

The system I tested has one 6 layer board with two S12DG128 and one S08DZ16. Additionally there are more 4 and 2 layer boards in the system with more S12DG128 and S12C32. Total BOM is on several thousand components. We have not encountered a single problem related to ESD.

The system has also gone through MIL spec EMC tests that are far more aggressive than the commercial ones. I have many DG128 parts in products that have lived in almost 10 years now, running 24 hours a day in rough industry/automotive environments. The sole reason we use Freescale is that the MCUs perform excellent in terms of EMC/ESD immunity in these demanding environments. That's what the MCUs are good for! Apart from the immunity, there is really no other particular reason for me to use Freescale MCUs.

[Eric_t]

Daniel Lundin,

I have made two (4 layer) pcb with HCS12 controller. The first one has all signals on top and bottom layers and supply in mid layers. The other has all signals in mid layers while top and bottom layer are full covered with GND coper. The first one resets after ESD. The second does not reset after ESD.  

I have recently received a pcb board (with HCS08) from a big manufacturer. Top and bottom layer are full covered with GND coper and the signals are routed in the mid layers. Just like my second solution. This kind of design increases by fears about freescale and ESD.   

Daniel, you have said that ESD has no effect on yours 2 layer pcb. WE ARE WILLING TO COOPERATE WITH YOU.

Please contact with us in the following emails:

touskofidis@semitron.gr

toyskofidis@yahoo.gr

Nikos 

[Lundin]

Unfortunately, I'm merely a software engineer and far from an expert on this subject. I could give you an amateur's opinion on your PCB layout, but I'm not sure that's helpful :smileyhappy:. I don't think there is any particular magic behind it though, there are countless of companies using these MCUs without ESD problems.

[kef]

• Since no one refers any problem in my schematic,

Not true. Lundin mentioned the lack of external LVD circuit (brown out protection), which is required for old S12D/S12A families.

• I tend to believe that freescale is problematic on ESD.

I can't agree. It doesn't wonder me that your antenna-like-PCB has problems with ESD.

Are you serious to limit yuorself to two layers when using >=80pin MCU? Low pin count S12C/S12P/S12G/.. would make more sense on 2 layers PCB. All 3 have built in LVD. Older S12C still requires external PLL filter components, but newer S12P/G don't need even this. This should add to better ESD immunity.

[Eric_t]

Kef,

Brown out protection is needed when the voltage drops. It has nothing to do with ESD.

The finally design will have Brown out protection and a 4 layer pcb. The design that I have posted is just for test reasons. Even though VuC and GND are routed around the board and they are antenna-like, HCS12 should not reset when I apply ESD.

Kef, just think what you are saying. You said “It doesn't wonder me that your antenna-like-PCB has problems with ESD”. Accidentally you have confirmed my doubts about HCS12 controller and ESD.  Do not forget that a two layer pcb will have routes antenna-like, but controller should not be affected by ESD.

Definitely something is going wrong with freescale HCS12 and Coldfire v1 controllers.

[kef]

• Brown out protection is needed when the voltage drops. It has nothing to do with ESD.

Yes, but it is required component. What's the point of testing ESD immunity without component which you will need to add anyway? Not only each component, each track matters.

• The finally design will have Brown out protection and a 4 layer pcb. The design that I have posted is just for test reasons. Even though VuC and GND are routed around the board and they are antenna-like, HCS12 should not reset when I apply ESD.

IMO good PCB/SCH design survives ESD discharge directly to PCB gnd layer with no reset, no matter what MCU are you using. I see no point in doing and ESD testing such poor PCBs.  Did you do that PCB to disadvertise S12 MCU? Try again.

BTW, since your MCU resets, you should investigate reset source. Is it power on reset, COP reset, clock monitor reset or indeed /RESET pin reset?

[Eric_t]

Daniel, Radek

Thank you for your response.

I have mounted a 4148 diode. I have drawn a zener diode by mistake. Actually 4148 diode is not necessary.

I have placed series register (220R) to Reset and BDM and I have changed the 100nF capacitor (Reset pin) with 100pF.

Also I have placed a shottky diode between Vout and Vin of 7805 and I have connected PE0 and PE1 directly to VuC.

I am not using PLL, so XFC pin should connect to VDDPLL through a 4K7 registor. (Be aware that there is an error on HCS12 manual. It says that XFC pin must be tied to VDDPLL, if PLL is not used, but this connection may cause damage to HCS12 controller )

Unfortunately there is no improve on electrostatic discharge. HCS12 still resets.

It is hard to believe that freescale is problematic on electrostatic discharge (also coldfire V1 resets). Probably there is some details about freescale controllers that I am not aware about them.

[RadekS]

I shortly checked your scheme:

1. You used just R112 as PLL filter (XFC pin). If you using PLL function, you should connect second-order, low-pass filter to eliminate the VCO input ripple. If PLL usage is not required the XFC pin must be tied to VDDPLL. In attachment you can find PLL filter calculator.
2. I would like recommend PE7(XCLKS) pin connect directly to GND (without pull-down).
3. I would like recommend PE0 and PE1 pins connect to VuC trough pull-ups.
4. I would like recommend add rectifier (shottky) diode between Vout and Vin(cathode) of LDO(7805) as protection.

[Lundin]

Some comments:

- The "4148" diode on the reset line looks fishy. Is it supposed to be a plain 1N4148 signal diode? It is drawn as a zener. What component is mounted there in the real world? What's the purpose, low voltage protection? I hope you are aware that DG256 has no internal brown-out protection (LVD), so you should have an external voltage supervisor circuit on the PCB.

- 100nF may be too big a cap for the reset pin to handle. In my experience, the S12 expects a rather steep reset edge. Try changing this to 100pF.

- On the reset and BKGD lines, consider adding series resistors between the MCU and the connector (100 ohm or so), since the connector is likely to pick up the ESD charges. Perhaps in combination with small decoupling caps.

(If this is a new project, consider using another S12 device with built-in LVD, so make the BOM list shorter if nothing else. The D family was the first S12 family released, so they are a bit odd. All new Freescale MCUs have LVD.)

[rafael]

Hi,

First, we will need more info on how is the test set up, as in where are grounds connected, is the PCB / power supply isolated from the 8KV source? common ground, etc. Next, under what conditions does it reset? does it happen only on the ground side of the PCB, or both (try turning over the PCB and test)? what is the uC doing (blinking LED only? what about the other ports)? There are several things you can do to mitigate ESD problems. I see on the PCB that the VuC (positive uC supply) is routed around the board in paralell to the ground line, so it behaves as an antenna.... also, there are no GND plane pours (pour GND planes on unused PCB space). Why are there cuts in the plane under the uC? The uC may be resetting due to a brown out condition, the voltage regulator is an linear device and can be reacting to the ESD and messing with the output.

Hope this helps,

--Rafa

[Eric_t]

Hi Rafael,

During test, uC only blinks a led. All others IO are inputs with pull down resistors (some IO have pull up resistors).

PCB is powered form a 12V battery, so it is complete isolated from 8KV source.

I turned over pcb and I had the same results.

Even though VuC and GND are rounded around pcb (behave as antenna), HCS12 does not supposed to reset.

There is no ground plane on the whole bottom layer (there is copper under uC and oscillator) because it is just a test

pcb board and we want see how uC behaves under electrostatic discharge. Also the lack of ground plane on the bottom

layer should have no effect on electrostatic discharge.

I have made similar pcb with AVR, PIC, NEC, HCS12 and Coldfire V1.

AVR, PIC, NEC do not reset even if I apply 15KV air discharge. HCS12 and Coldfire V1 reset with 6KV air discharge.

It seems that I miss something with Freescale controllers. I suspect that there is some error on design (capacitors on VDD1, VDD2, VDDPLL or something else). 

I have attached a picture of ESD test.

The uC may be resetting due to a brown out condition, the voltage regulator is an linear device and can be reacting to the ESD and messing with the output.

Is there something that we can do for that?

Thanks for your help

Nikos

[measurementblue]

Nikos,

I believe you can find several people who can help you on TheConnectingEdge.com. There are engineers who work on embedded systems and EMI engineers as well. Just register and post your question there.

[Eric_t]

Hi Martin,

I will follow your advice and I will post a question atTheConnectingEdge.com.

Nikos

[measurementblue]

Nikos,

I would like to write a blog about your problem with the hope that I can get you more help. I will link to the thread in the Freescale community, so we might have conversations going in both places.

Regards,

Martin Rowe

Editor, The Connecting Edge

editors@theconnectingedge.com