HC9S12 Level Sensitive IRQ Operation

[KH_SRNL]

In the default configuration (level sensitive), if the IRQ is asserted (line pulled low) and the IRQ service routine is executed, will another interrupt be generated if the line remains low? In other words, is the IRQ line required to be driven high before a second IRQ interrupt can be generated when configured for level sensitive operation?

[kef]

In level sensitive mode /IRQ pulled low should keep generating interrupts. Setting /IRQ high should not be required.

Do you see it opposite? If yes, then did you notice that IRQE bit is write once in normal operating modes? By default /IRQ is level sensitive and you can switch to edge sensitive mode or lock level sensitive mode only once.

[KH_SRNL]

Thanks.  My observations match your description.  I was using the IRQ in conjunction with a Max3100 SPI to UART.  The Max3100 asserted the 9S12 IRQ line when data was in the receive buffer, but I couldn't send data with the SPI in interrupt mode.  A coworker is using the IRQ in conjunction with a periodic interrupt generated by an RTC (50% duty cycle high / low).  It appears he may only be processing data 50% of the time as the IRQ is pulled low the other 50%.  We'll investigate this as well.

Thanks for the confirmation.