Good morning,
I'm using an MC9S12DG256 microcontroller; it works with a 16 MHz oscillator ( the oscillator is connected to XTAL pin ) and with a PLL set in order to have a clock of 48 MHz. So, the bus clock is set to 24 MHz.
In this situation, what is the correct value for the ECLKDIV register?
Looking in the manual (S12EETS4KV2.pdf) at page 15 there is a schematic for calculate the right value.
As far as I know, the EETS4K module works using the Oscillator clock. However, looking the schematic at page 15 of that manual, I see that I have to use Tbus.
Tbus, looking page 14, is the period of the bus clock; however my bus clock is working at 24 MHz..
So, am I using the correct values for calculating the value to put in the ECLKDIV register?
I've tried, using those parameters, to calculate the value for my ECLKDIV register: the result seems to be 0x4A
However I've some doubts if I try to calculate the value in a case the PLL is turned off; in fact, it seems the value is the same.
Is it all correct? If I try to divide the oscillator clock with that value (in order to find the EETS4K frequency), I see this result:
Oscillator clock / (8 * 10) = 16MHz / (8 * 10) = 200kHz (the 8 divisor is due to the PRDIV8 bit).
So it seems all correct but I have a doubt regarding that Tbus in the diagram at page 15 in the S12EETS4KV2 pdf; Tbus changes in the PLL ON - PLL OFF situation but it seems it's not a problem.
Thanks in advance
You calculated it right, ECLKDIV = 0x4A
EEPROM clock is derived from oscilator clock (16MHz). Tbus is bus clock period in microseconds, with PLL selected 1/24MHz ~ 0.04us, and with PLL not selected - 1/8MHz = 0.125us
Number 5 in the formula is target EEPROM clock period, 1/200kHz = 5us.
5us + 0.04us, or 5us + 0.125us doesn't change resulting ECLKDIV setting. Tbus matters only at slow bus clocks
Thanks for your reply!
You cleared all of my doubts..
Have a nice day,
Stefano