Evaluating S12X & XGate

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Evaluating S12X & XGate

NXP Employee
NXP Employee

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Posted: Tue Jun 28, 2005  9:24 am


Will code created for an S12 processor run on S12X? At some point I would like to evaluate the new S12X, without going to the expense of purchasing a new Cosmic C compiler Zap, and my P&E Multilink12 BDM interface. Evaluating I have not looked at the XGate processor, but perhaps a compiler for that is not essential anyway?


I would appreciate the groups comments.



Posted: Tue Jun 28, 2005  1:37 pm


I imagine you could at least configure linking to addresses that work, and the HC12 instruction set would work. The problem might be that you'd have to rig your own routines to use new features (including XGate). If that is the only reason you want to evaluate, then you would not get a good evaluation since you would need to be familiar with how it all should work. I suppose if all you want is more memory and faster clock speed, then it should be easy enough.


Since I have never seen it, I really shouldn't say. Just that I'm using GCC-m68hc1x and I expect to be able to use it without waiting years for someone else to add specific support for it.




Posted: Tue Jun 28, 2005  6:34 pm


Evaluating the S12X with HCS-12 tools is rather limiting.


You can implement the "glueless" interface to external RAM.


You won't find much new except the faster clock speed, and some changes in the IO gear.


If you plan to have lots of external RAM, you will probably want to use either RAM paging or global addressing, which are S12X only features.


The new instructions won't be used by the HCS-12 compilers, and you will find it hard to use the extra on-chip EEPROM and RAM that are accessed using the EPAGE and RPAGE registers, which behave differently from the 68HC812A4 ones.


The XGate co-processor will be hard to access.


The XGate runs at more than twice the instruction rate of the S12X CPU and is a complete and capable CPU in its own right.


The only really exotic feature of the XGate is the way it handles interrupts, which assumes that the code for interrupts executes quickly.


Freescale believes that using the XGate to handle IO interrupts and give the effect of a DMA channel will give a big performance boost to the system.


I recommend careful study the latest Freescale documentation before trying to do much with an S12X part. These documents, in particular:


9S12XDP512DGV2.pdf. S12XMMCV2.pdf, S12XINTV1.pdf, S12XGATEV2.pdf, S12XCPUV1.pdf, and S12XDP512PIMV2.pdf


Because of the ways the various modules and documents interact, you will probably find it necessary to read some of these documents more than once.



Posted: Wed Jun 29, 2005  1:43 am


Do you have any idea where the documentation for the S12X went from the Freescale website? A few days ago I was able to download some of the block users guides but now since yesterday I noticed that there are only a bunch of application notes and just the S12X CPU ref manual. Any idea how to get at these guides?



Posted: Wed Jun 29, 2005  4:42 am


There is a new version of the "MC9S12XDP512 Data Sheet":




which appears to have all the individual pdf files that were in the old version all rolled into a single 900 page document.


The CPU manual is at:



And is only 502 pages.


I haven't checked through it in detail to see what has changed.


The sections that correspond to my previous list seem to be:


My revised introductory reading list is, the CPU manual, and these chapters of the "Data Sheet":

Chapter 1 Device Overview (MC9S12XDP512V2)

Chapter 4 Port Integration Module (S12XDP512PIMV2)

Chapter 9 XGATE (S12XGATEV2)

Chapter 21 Interrupt (S12XINTV1)

Chapter 23 Memory Mapping Control (S12XMMCV2)


I don't know anyone who has understood close to all of it on the first reading. Expect to have to read parts of those chapters several times to understand them.


Use Adobe Acrobat Reader's search feature to look up bit names and register names that you don't understand.


Be warned that the S12X introduces two completely new memory address mappings, the global addresses, and the XGate addresses. They do provide some real advantages, but I haven't seen a simple way to explain them. The "Data Sheet" has diagrams and examples of them that are worth studying carefully.



Posted: Thu Jun 30, 2005  3:25 pm


FYI, The S12X was launched to the general market today.


I just saw this http://www.freescale.com/webapp/sps/site/display.jsp?nodeId=093623&filePath=/media_center/news_relea... Release


Have a look… the documentation won’t be too far away.



Posted: Thu Jun 30, 2005  3:28 pm


Or better, look here,




Posted: Thu Jun 30, 2005  4:26 pm


> FYI, The S12X was launched to the general market today.


So the cheapest is the MC9S12XA256, cheaper and faster than 25MHz 9S12.


Do you have any information when smaller (and even cheaper) derivatives arrive?



Posted: Fri Jul 8, 2005  7:22 pm


I have no more information to give but I wouldn't be surprised to see more versions.



Posted: Fri Jul 8, 2005  7:59 pm


They typically release a big version first (512K Flash), then gradually work their way down to the smallest and cheapest.

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Contributor I

Has anyone tried to port from MC9S12A256 to MC9S12XA256 part or the equivalent? The reason for switching micros is that I need the extra SCI ports the MC9S12XA256 offers. 


I am trying to determine if I can port my application over without needing to turn on/use Xgate initially. The intent is to get the app ported to the MC9S12XA256 and get it up and running quickly. As time permitted I would begin to utilize XGate's features.


AN3224 hints that this is possible. I am hoping someone has actually done it and can shed some insight.


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