Debugger with watch dog enabled

[rahulkrishna]

I have some questions please help

1. Can I work with debugger with watch dog enabled. Currently when working with debugger i am disabling the watch dog timer. But right now i am facing one critical issue where the watch dog reset is happening in production. I want to simulate the same using debugger. any settings i need to make.

2. I found that an unknown message is happening along with two standard identifiers immediately  which are not expected and the system reset happens. Is there any possibility that a reset happens if CAN message ids get corrupted. I am using CAN driver interrupts handled by xgate and processed by s12x. Any possibility because of semaphore and etc. please advice.

3. Are there any other kinds of reset apart from watch dog like illegal instruction etc.

Micro i am using is S12X EQ.

[RadekS]

Hi rahul,

1. Debugging when COP watchdog is enabled is quite tricky. You probably cannot use stepping over code because stepping takes longer time than COP timeout. You could set COPCTL_RSBCK bit for Stops the COP and RTI counters whenever the part is in Active BDM mode, but I am afraid that it will not help you so much. For debugging COP reset, you could use indirect methods like LEDs, triggers and trace (trace buffer is not affected by COP reset). For more details, please see "c:\Program Files (x86)\Freescale\CWS12v5.1\Help\PDF\Debugger_HC12.pdf" document.

Are you really sure that it is really COP who invoked MCU reset?

2. We do not know about any direct connection between CAN and reset. So, there must be probably some other issue like illegal address reset, endless loop – COP timeout, low voltage reset,…

Semaphores have to be used for access to shared memory or shared peripheral between CPU and XGATE.

3. Reset sources are described in Table 1-13. Reset Sources and Vector Locations in RM.

I hope it helps you.

Have a great day,
RadekS

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[rahulkrishna]

Really it is little bit confusing about the resets. If i take the example of cop watch dog reset if it times out reset will happen then why there is separate interrupt address for COP watchdog reset that is $FFFA why not it is $FFFE. In case if i do not add any function is cop watchdog reset isr. what will happen? Or is the sequence is like first goes to the address $FFFA then goes to $FFFE. please help. Similarly for clock monitor reset and illegal address reset.