CPU instruction executing in RAM

[rahulkrishna]

I have seen that to simulate the reset using illegal address reset you have to execute CPU instruction from RAM. Can someone please explain me what is this? RAM can only hold data or it can also execute code? How do the processor know you are executing from Flash or RAM?

[rahulkrishna]

You answered almost everything except one thing. I have some can log data which the micro is sending continuously.  At  the time of reset all values become zero. Now  to my most important question.suppose the stack overflow happens will micro reset or not. I tried doing it myself by allocatng local variable with size greater than stack size but micro runs normally on high level.

[RadekS]

Hi rahul,

According your case: stack is at 0x2000 to 0x2100 and 0x1000 to 0x1FFF is paged RAM window.

In that case, the stack overflow will rewrite your data in paged RAM according to currently active RPAGE.

This will not cause illegal address reset.

Even when code will continue in store onto the stack, overflow below 0x1000 will not cause illegal address reset. At address 0x0C00 to 0x0FFF is buffer RAM for EEEPROM and address 0x0800 to 0x0BFF is buffer RAM window for EEEPROM.

Additionally, 0x0000 to 0x07FF is defined as register space, therefore, even stack overflow below 0x800 will not cause illegal address reset.

Of course, write registers with by stacked information will definitely cause unpredictable behavior.

BTW: The stacking to flash will also do not cause illegal address reset.

In short: Push onto and pull from the stack will not cause illegal address reset because these operations work with near addresses in SP register and base 64kB address space is quite full in case of S12XE.

The simplest way how to cause illegal address reset is using unimplemented page. For example: when we set RPAGE to 0x15.

I hope it helps you.

Have a great day,
RadekS

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[rahulkrishna]

Thank you so much it  cleared lot of doubts.

[RadekS]

Hi rahul,

As Edward correctly mentioned, CPU could execute code from RAM. CPU does not care about the source of code location until this code is valid.

Of course, this code has to be built for that location or it has to be position-independent code (PIC, see compiler documentation).

Typical places where we use code execution in RAM are flash routines (we cannot simultaneously execute code from the same flash block where we want to write data). Another typical case is time critical routine - execution from RAM should be faster.

You could place your code into RAM for example by pragmas:

#pragma CODE_SEG MY_RAM_SEG

//my code in RAM

#pragma CODE_SEG DEFAULT

See "c:\Program Files (x86)\Freescale\CWS12v5.1\Help\PDF\Build_Tools_Utilities.pdf".

As Edward correctly mentioned, COP is the typical way how to reset MCU by software.

For example:

COPCTL = 0x01; //enable COP

ARMCOP = 0x00;  //immediately reset MCU

Using illegal address reset has sense only in two cases:

1. When we have to initialize COPCTL as 0x00 during initialization (I already meet with that requirement). This write will not enable COP, but it consumes write once condition for Normal mode. In that case, we cannot initialize COP until next MCU reset.
2. When we already use different startup code for COP reset (COP has its own reset vector) and we have to distinguish between COP and software reset.

I hope it helps you.

Have a great day,
RadekS

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[rahulkrishna]

Thanks all for your kind replies. i have this specific question if you can answer me it will be of great help. My fundamental problem is reset happens randomly and finding out the different possibilities and trying to simulate the same. I am doubting some kind of RAM reset. I don't have the actual system before me to find out the reason, I have some log data. My stack size is 0x100, so my stack address range from map file is 0x2000 to 0x2100. The data comes from top to bottom. Suppose if exceed 0x100 bytes of stack what happens if i go below 0x2000. From the data sheet i can see there is paged memory below. So if i write here will a reset happen, I tried my self could not reset it. Please help. Another question is in case a reset happens what is recovery mechanism every time does it take the same time to come back to execute or it can take different timings to come back to main function. Finally i could reset using flash illegal address using the following functions from one of the other questions. Can someone please tell me the same function for RAM. I am using s12xEQ512

void Reset() {

    static dword val;

    val = *(dword * __far)0x00600000;

}

[RadekS]

Hi rahul,

What kind of log data you have?

As first I would like to recommend investigation of reset source:

1. Please, disassembly capacitor from reset pin if their capacitance is too high for recognition of COP/CM reset. More details: https://community.freescale.com/docs/DOC-103737

2. Please create specific routines for COP and CM reset vectors. For example:

//function prototype of _Startup function (Start12.c)

void _Startup(void);

//******************************************************************************

// COP interurpt

//******************************************************************************

#pragma CODE_SEG NON_BANKED

interrupt 2 void COP_ISR(void)

{

    DDRA = 0xff;

    PORTA = 0x00;          //LEDs on - show we entered the COP_ISR    

    for(i=0; i<60000; i++)  //delay

    {

        asm nop;

    }

    PORTA = 0xff;

    asm jmp _Startup;      //jump to power-on reset vector

    // !!! RTI instruction cannot be executed because this is not interrupt !!!

}

#pragma CODE_SEG DEFAULT

Note: similar way we could define “interrupt 1 void CM_ISR” routine.

3. If COP or CM are not reset sources (e.g. LEDs do not signalize after spurious reset), we should clear PORF, LVRF and ILAF flags in CRGFLG register check these flags after spurious reset.If none of these reset sources are detected, only External Reset remains. Please check schematic…

4. If none of these reset sources are detected, only External Reset remains. Please check schematic…

The stack overflow may be tested by watermark technique – You will fill 0x2000 to 0x20FF by some known pattern e.g. 0x55 (directly after reset). After that, you will let run code and after some time, you could check how many bytes from the stack was used.

S12XE have three reset vectors. If all three vectors point to the same code, code execution time should be almost the same. Reset sequence length for system resets also depends on external pull-up resistor and capacitor at RESET pin.

I am afraid that I am not sure with your request about “the same function for RAM”.

Illegal address reset is caused by access to unimplemented memory. From this point of view it has no sense to think whether 0x00600000 is in RAM or Flash because this address is not valid.

After reset, CPU starts code executing from address stored in appropriate reset vector. If we want execute some code from RAM, we have to copy this code from flash to RAM and call this function (or jump to subroutine) in RAM. I do not see any difference between execution your Reset() function from flash or from RAM. Result will be the same.

I hope it helps you.

Have a great day,
RadekS

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[kef2]

No, you don't need to execute from RAM to trigger illegal address reset.

CPU12(X) can execute code from any kind of memory, even from peripheral registers like DDRA  or from CAN message buffer..

Illegal address reset is not the best choice to trigger MCU reset. For example in expanded mode I think you won't be able to find location, which could trigger illegal address reset. Another problem is that Freescale ofter ships chips with much more memory than one would expect looking at letters and numbers on chip package. So how do you know if particular location is illegal on chip you have at hand?...

COP reset is much better solution.

Regards

Edward