Application Note AN2617 refers to: Library Macro Files and Software Example A set of library files have been prepared to allow this interrupt priority scheme to be easily incorporated into any application. Can anyone tell me where to get this "set of lib

[gman8]

Application Note AN2617 refers to:

A set of library files have been prepared to allow this interrupt priority scheme to be easily incorporated into any application. The function of these library files is demonstrated in the software written to accompany this application note. The library files utilize macros that set the relevant bit masks based on the priority level. The software is configured as a macro to provide the most efficient implementation of the priority scheme. Please refer to the ‘read me’ file included with the software for further information about the function and configuration of the library files. The files can be simply copied out of the example software and used in any application requiring interrupt priority functionality.

Can anyone tell me where to get this "set of library files"  ?

[kef2 · Accepted solution]

Just use you favorite search engine. You need to accept agreement to download:

Software files for AN2617

At the other hand do you really need interrupt priority scheme or just interruptible interrupt service routine(s) (ISR)? When you have one(few) ISR's, which take long and block execution of something like SCI Rx ISR, you just need to make this slow ISR interruptible, interrupt priority scheme is not required. To make HCS12 ISR interruptible you need to do two things in the body of this slow interrupt: 1) mask this slow interrupt and asm("CLI"); on entry, and 2) unmask this slow interrupt at exit.

Edward

[gman8]

Edward,

     Thanks for quick response. 

     Answer to your question: case in point, 5 or 6 interrupts in system

     Need a timer based PWM ISR that can not wait on other ISRs.

     Yes re-EnableInterrupts within every other ISR is an option (without a priority schema) ,

     however it do not see it as a good one because:

          - would have to analyze each ISRs behavior for possible mis-behavior when other equal priority ISRs interrupt.

          - want to change current behavior as little as possible; here ISR run to completion.

[kef2]

If you worry about possible misbehavior, on entry to each low level interrupt you could mask all low level interrupts.

As I understand this AN (I didn't look into code), priority schema applies only to timer interrupts; SCI and others are not included in priority schema and are left being high priority interrupts. Any way any smart SW interrupt prioritization adds quite a lot to interrupt latency and affects performance. For good performance it should be as simple = as fast as possible. Interrupt prioritization only for TIM/ECT channels is easy and fast since all interrupt masks are in the same masks register. Things complicate a lot when you have other interrupt sources and want to keep PWM ISR high priority and able to interrupt all other ISR's. Iterating through the list of interrupt mask register can take a lot of time...

Regards

Edward