I have some assembly code written for the 9S12X that I am trying to figure out what it does. One instruction is:
ADDD 8,SP I believe that is and instruction to add the contents of Accu D with the contents at stack +8.
Another instruction is :
ADDD (8+2),SP Is that the same as ADDD 10,SP which would be an instruction to add the contents of Accu D with the contents at stack +10?
Regards,
Robert
解決済! 解決策の投稿を見る。
Hi Robert,
So, (8+2) is an offset to location M which is the SP in this case
M = 0x6E, M+1 = 0x88 which is added to D (A = 0x00, B=0x00).
D = 0x6E88
Regards,
Daniel
Hello Robert,
I'm sorry for the delay.
It is explained in the CPU12X reference manual v01.04.
It concatenates the content of M with the content of M+1 and adds it to the accumulator D.
I believe you can test it in CW 5.2, there is a simulator if you don't have any board.
Regards,
Daniel
Hi Daniel,
Thanks for your response. Yes, I had looked up the ADDD instruction as you posted, and it makes sense when ADDD is followed by a memory location, but I am still confused as to what (8+2),SP means. I'm afraid that any manipulations on the stack confuse me easily.
Regards,
Robert
Hi Daniel,
Got it, and thanks so much for the lesson in debugging. So it looks like I was correct in my original post where I thought that (8+2),SP could be the same as 10,SP. I wonder why the author would chose to do it that way?
Regards,
Robert
Hi Robert,
So, (8+2) is an offset to location M which is the SP in this case
M = 0x6E, M+1 = 0x88 which is added to D (A = 0x00, B=0x00).
D = 0x6E88
Regards,
Daniel