ddr-question

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ddr-question

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maikkannan
Contributor I

Hi,

We have a custom LS1043A board with on board memory IC (2 nos of MT40A256M16GE-083E)

We are unable to boot the system . We have noticed the below signals in the DDR configuration .

 Memory Chip1 - 

 DQ(0-15)

CS0

CKE0

ODT0

MCLK0(p/n)

 

Memory Chip 2

 DQ(16-31)

CS1

CKE1

ODT1

MCLK0(p/n)

Our understanding is that chip2 should have MCK1(p/n) connected ,since the chip uses CKE1.

Hence we can use only Chip 1 for booting the system

Kindly confirm if our understanding is correct & the DDR rank configuration we have to follow.

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ufedor
NXP Employee
NXP Employee

You wrote:

> Our understanding is that chip2 should have MCK1(p/n) connected

Your understanding is not correct.

Correct connection should be:

Memory Chip 2

DQ(16-31)

CS0

CKE0

ODT0

MCLK0(p/n)

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