T4240 High Speed Serial

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

T4240 High Speed Serial

Jump to solution
2,316 Views
lesterhouston
Contributor I

I'm attempting to send data across the UARTs configured as RS422 using high baud rates.  Data transfer using the 115200 baud rate behave as expected, but I encounter overrun errors and inter-message gap issues when attemtping to use 230400 and 320k.  When issuing the following command I see that the UART ports are configured for MMIO.  It's my understanding that these ports could be configured for DMA which may eliminate my issues, but it's unlcear to me how I would configure the UART for DMA.  Can anyone provide some guidance on how to support these higher baud rates.

root@t4240rdb-64b:~# dmesg | grep tty
[    0.000000] Kernel command line: root=/dev/sda1 rw console=ttyS0,115200
[    3.031442] console [ttyS0] disabled
[    3.034973] serial8250.0: ttyS0 at MMIO 0xffe11c500 (irq = 36, base_baud = 22916666) is a 16550A
[    3.043708] console [ttyS0] enabled
[    3.058949] serial8250.0: ttyS1 at MMIO 0xffe11c600 (irq = 36, base_baud = 22916666) is a 16550A
[    3.068178] serial8250.0: ttyS2 at MMIO 0xffe11d500 (irq = 37, base_baud = 22916666) is a 16550A
[    3.077408] serial8250.0: ttyS3 at MMIO 0xffe11d600 (irq = 37, base_baud = 22916666) is a 16550A
0 Kudos
Reply
1 Solution
2,284 Views
ufedor
NXP Employee
NXP Employee

Previous response means that there is no technical possibility to use DMA for UART on the T4240 SOC.

 

> Do you have any suggestions for achieving better performance

> with the UARTs configured as RS422 for baud rates greater than 115.2k?

Please try to optimize the UART FIFO thresholds.

View solution in original post

3 Replies
2,307 Views
ufedor
NXP Employee
NXP Employee

The DUART controller programming model was designed to be compatible with the industry-standard National Semiconductor PC16550D/52D DUART with 16 byte RX&TX FIFOs. That device has a DMA  mode which causes it to signal (via dedicated RXRDY# and TXRDY# signals) an external DMA module to empty the RX FIFO or fill the TX FIFO when a programmed threshold has been reached.

Any "DMA" wording in the DUART chapter of our manual has been written to be consistent with that programming model. However there is no possibility to use a SOC DMA controller to transfer data to/from DUART because it would require either Smart DMA or eDMA, which T4 does not possess.

0 Kudos
Reply
2,298 Views
lesterhouston
Contributor I

Thanks for the information.  Sounds like I would need to develop a DMA kernel module along with make use of the dedicated signals to utilize the UART port's DMA mode.  Are you aware of any open source or existing modules?  Do you have any suggestions for achieving better performance with the UARTs configured as RS422 for baud rates greater than 115.2k?

0 Kudos
Reply
2,285 Views
ufedor
NXP Employee
NXP Employee

Previous response means that there is no technical possibility to use DMA for UART on the T4240 SOC.

 

> Do you have any suggestions for achieving better performance

> with the UARTs configured as RS422 for baud rates greater than 115.2k?

Please try to optimize the UART FIFO thresholds.